Patents by Inventor Yuichi Iizuka

Yuichi Iizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated retrieval scheme for retrieving semi-structured documents
    Patent number: 6424980
    Abstract: An integrated retrieval scheme retrieves data involved in a plurality of semi-structured documents scattering over open networks and collects the required information item by item from the semi-structured documents through a unified interface without regard to differences in the document structures, presentation styles, and elements of the semi-structured documents. The search scheme receives a query consisting of search items and search conditions from a user.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: July 23, 2002
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yuichi Iizuka, Mitsuaki Tsunakawa, Toshihiro Nagasue, Takashi Hoshino, Hiroki Machihara
  • Scheme for automatic data conversion definition generation according to data feature in visual multidimensional data analysis tool
    Patent number: 6191792
    Abstract: A scheme for automatic data conversion definition generation based on data feature such as a decision tree or a statistical feature, so as to enable a quick data analysis in a visual multidimensional data analysis tool.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: February 20, 2001
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yuichi Iizuka, Seiji Isobe, Kiyoshi Kurokawa, Hisako Shiohara, Tetsuya Iizuka
  • Flash memory incorporating microcomputer having on-board writing function
    Patent number: 5872994
    Abstract: In a microcomputer comprising internal buses, a serial communication interface, a flash memory, a RAM, a ROM for storing a writing program, an input/output port, a CPU, and a mode control unit for setting various operation modes and test modes in the microcomputer, a switching circuit is connected between the ROM and the internal buses and between the input/output port and the internal buses. The mode control unit operates the switching circuit in an emulation test mode so that the ROM is deactivated and the input/output port is activated. Then, the CPU reads a program from the serial communication interface and writes the program into the flash memory in accordance with a writing program from the input/output port.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: February 16, 1999
    Assignee: NEC Corporation
    Inventors: Shin-Ichiro Akiyama, Sadahiro Yasuda, Yuichi Iizuka, Hiroaki Nishimoto, Yuuichi Osada
  • Write to flash EEPROM built in microcomputer
    Patent number: 5694360
    Abstract: In a data write apparatus to a flash electrically erasable programmable read only memory (EEPROM) built in a microcomputer which is mounted on a circuit board, a write control section first initializes the flash EEPROM to allow data to be written in the flash EEPROM, and supplies a signal indicative of the data for the flash EEPROM. A level converting section convertes a level of the data signal such that the data signal level matches to an actual operation voltage level of the flash EEPROM and supplies the converted data signal to the flash EEPROM such that the data is written in the flash EEPROM.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: December 2, 1997
    Assignee: NEC Corporation
    Inventors: Yuichi Iizuka, Hiroshi Hikichi