Patents by Inventor Yuichi Kakizono
Yuichi Kakizono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9550264Abstract: Disclosure relates to a fixed abrasive-grain processing device and a method of fixed abrasive-grain processing used for producing a semiconductor wafer, and a method for producing a semiconductor wafer which make the surface of the semiconductor wafer possible to have preferable flatness and which can prevent the number of steps and the installation area of facilities from increasing.Type: GrantFiled: June 4, 2010Date of Patent: January 24, 2017Assignee: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono, Yoshiaki Kurosawa
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Patent number: 9017145Abstract: The present invention provides a polishing solution distribution apparatus capable of reducing distribution deviation of polishing solution even when leveling for installation is insufficient or inclination of an installation location varies and a polishing apparatus having the same. The polishing solution distribution apparatus includes a cone-shaped branch body in which a solution pan to store supplied polishing solution is formed and in which plural flow passages radially connected to a side face of the solution pan respectively and having a delivery port to supply polishing solution to a position lower than the connected position are formed, a support portion to support the branch body, and a universal joint mechanism to support the branch body via the support portion at a position being higher than the gravity center of the branch body.Type: GrantFiled: April 11, 2011Date of Patent: April 28, 2015Assignee: Sumco CorporationInventors: Yoshiaki Kurosawa, Tomohiro Hashii, Yuichi Kakizono
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Publication number: 20120315739Abstract: All treatments performed in machining processes other than a polishing process are performed while pure water free from free abrasive grains is supplied. Thus, an amount of abrasive grains included in a used processing liquid discharged in each process is reduced and semiconductor scraps are collected from the used slurry for recycling.Type: ApplicationFiled: February 16, 2011Publication date: December 13, 2012Applicant: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono, Yoshiaki Kurosawa
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Publication number: 20120071064Abstract: Disclosure relates to a fixed abrasive-grain processing device and a method of fixed abrasive-grain processing used for producing a semiconductor wafer, and a method for producing a semiconductor wafer which make the surface of the semiconductor wafer possible to have preferable flatness and which can prevent the number of steps and the installation area of facilities from increasing.Type: ApplicationFiled: June 4, 2010Publication date: March 22, 2012Applicant: Sumco CorporationInventors: Tomohiro Hashii, Yuichi Kakizono, Yoshiaki Kurosawa
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Patent number: 8092277Abstract: A method of grinding semiconductor wafers including simultaneously grinding both surfaces of multiple semiconductor wafers by rotating the wafers between a pair of upper and lower rotating surface plates in a state where the wafers are held on a carrier so that centers of the wafers are positioned on a circumference of a single circle, wherein a ratio of an area of a circle passing through the centers of the wafers to an area of one of the wafers is greater than or equal to 1.33 but less than 2.0; surfaces of the fixed abrasive grains comprised in the surface plates are comprised of pellets disposed in a grid-like fashion, with the pellets provided in a center portion and pellets provided in a peripheral portion being larger in size than the pellets provided in an intermediate portion.Type: GrantFiled: May 22, 2009Date of Patent: January 10, 2012Assignee: Sumco CorporationInventors: Tomohiro Hashii, Yasunori Yamada, Yuichi Kakizono
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Publication number: 20110263183Abstract: The present invention provides a polishing solution distribution apparatus capable of reducing distribution deviation of polishing solution even when leveling for installation is insufficient or inclination of an installation location varies and a polishing apparatus having the same. The polishing solution distribution apparatus includes a cone-shaped branch body in which a solution pan to store supplied polishing solution is formed and in which plural flow passages radially connected to a side face of the solution pan respectively and having a delivery port to supply polishing solution to a position lower than the connected position are formed, a support portion to support the branch body, and a universal joint mechanism to support the branch body via the support portion at a position being higher than the gravity center of the branch body.Type: ApplicationFiled: April 11, 2011Publication date: October 27, 2011Applicant: SUMCO CORPORATIONInventors: Yoshiaki KUROSAWA, Tomohiro HASHII, Yuichi KAKIZONO
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Publication number: 20090311808Abstract: A semiconductor wafer is produced by a method comprising a slicing step, an one-side polishing step and a chemical treating step, in which the kerf loss is reduced and the flatness is improved.Type: ApplicationFiled: June 1, 2009Publication date: December 17, 2009Applicant: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono
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Publication number: 20090311863Abstract: A semiconductor wafer is produced by a method comprising a slicing step of cutting out a thin disc-shaped semiconductor wafer from a crystalline ingot; a fixed grain bonded abrasive grinding step of sandwiching the semiconductor wafer between a pair of upper and lower plates each having a pad of fixed grain bonded abrasive to simultaneously grind both surfaces of the semiconductor wafer; and a one-side polishing step subjected to both surfaces of the semiconductor wafer after the fixed grain bonded abrasive grinding step.Type: ApplicationFiled: June 1, 2009Publication date: December 17, 2009Applicant: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono
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Publication number: 20090311949Abstract: A semiconductor wafer is produced by a method comprising a slicing step of cutting out a thin disc-shaped semiconductor wafer from a crystalline ingot; and a fixed grain bonded abrasive grinding step of sandwiching the semiconductor wafer between a pair of upper and lower plates each having a pad of fixed grain bonded abrasive to simultaneously grind both surfaces of the semiconductor wafer.Type: ApplicationFiled: June 1, 2009Publication date: December 17, 2009Applicant: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono
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Publication number: 20090311948Abstract: A semiconductor wafer is produced by a method comprising a slicing step, a fixed grain bonded abrasive grinding step and a beveling step, in which the kerf loss is reduced and the flatness is improved.Type: ApplicationFiled: June 1, 2009Publication date: December 17, 2009Applicant: SUMCO CORPORATIONInventors: Tomohiro Hashii, Yuichi Kakizono
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Publication number: 20090298396Abstract: A method of grinding semiconductor wafers including simultaneously grinding both surfaces of multiple semiconductor wafers by rotating the wafers between a pair of upper and lower rotating surface plates in a state where the wafers are held on a carrier so that centers of the wafers are positioned on a circumference of a single circle, wherein a ratio of an area of a circle passing through the centers of the wafers to an area of one of the wafers is greater than or equal to 1.33 but less than 2.0; surfaces of the fixed abrasive grains comprised in the surface plates are comprised of pellets disposed in a grid-like fashion, with the pellets provided in a center portion and pellets provided in a peripheral portion being larger in size than the pellets provided in an intermediate portion.Type: ApplicationFiled: May 22, 2009Publication date: December 3, 2009Applicant: SUMCO CORPORATIONInventors: Tomohiro HASHII, Yasunori YAMADA, Yuichi KAKIZONO
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Publication number: 20090298397Abstract: A method of grinding semiconductor wafers including simultaneously grinding both surfaces of multiple semiconductor wafers being ground by rotating the multiple semiconductor wafers between a pair of upper and lower rotating surface plates in a state where the multiple wafers are held on a carrier so that centers of the multiple wafers are positioned on a circumference of a single circle, wherein a ratio of an area of a circle passing through the centers of the multiple wafers to an area of one of the multiple wafers is greater than or equal to 1.33 but less than 2.0; a rotational speed of the multiple wafers falls within a range of 5 to 80 rpm; and the grinding of the multiple wafers with the rotating surface plates are conducted with fixed abrasive grains in the presence of an alkali solution.Type: ApplicationFiled: May 22, 2009Publication date: December 3, 2009Applicant: SUMCO CORPORATIONInventors: Yasunori YAMADA, Yuichi KAKIZONO, Kazushige TAKAISHI
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Patent number: 7288207Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: GrantFiled: January 31, 2006Date of Patent: October 30, 2007Assignee: Sumco CorporationInventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20070184658Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: ApplicationFiled: March 19, 2007Publication date: August 9, 2007Inventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20060169667Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: ApplicationFiled: January 31, 2006Publication date: August 3, 2006Inventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama