Patents by Inventor Yuichi Nakao

Yuichi Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8039390
    Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a groove forming step of forming a groove in an insulating layer made of an insulating material containing Si and O; an alloy film applying step of covering the side surface and the bottom surface of the groove with an alloy film made of an alloy material containing Cu and Mn by sputtering; a thinning step of reducing the thickness of a portion of the alloy film covering the bottom surface of the groove; a wire forming step of forming a Cu wire made of a metallic material mainly composed of Cu in the groove after the thinning step; and a barrier film forming step of forming a barrier film made of MnSiO between the Cu wire and the insulating layer by heat treatment.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: October 18, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Yuichi Nakao, Satoshi Kageyama, Yoshihisa Takada
  • Publication number: 20110215482
    Abstract: The semiconductor device according to the present invention includes a semiconductor layer, an interlayer dielectric film formed on the semiconductor layer, a wire formed on the interlayer dielectric film with a metallic material to have a width of not more than 0.4 ?m, and a broad portion integrally formed on the wire to extend from the wire in the width direction thereof.
    Type: Application
    Filed: May 12, 2011
    Publication date: September 8, 2011
    Inventors: Satoshi Kageyama, Yuichi Nakao
  • Publication number: 20110169135
    Abstract: A semiconductor-storage-device manufacturing method of the present invention is a method for manufacturing a semiconductor storage device provided with a ferroelectric capacitor including a lower electrode, a ferroelectric film, and an upper electrode, and the method includes a step of embedding a first metal plug and a second metal plug in an insulating layer; a step of forming a covering layer that covers at least the second metal plug while securing apart that comes into electric contact with the first metal plug; a step of forming a deposit structure by sequentially depositing a material for the lower electrode, a material for the ferroelectric film, and a material for the upper electrode after forming the covering layer; and a step of forming the ferroelectric capacitor by etching and removing other parts except a part of the deposit structure such that the part of the deposit structure remains on the first metal plug.
    Type: Application
    Filed: September 16, 2009
    Publication date: July 14, 2011
    Applicant: ROHM CO., LTD.
    Inventor: Yuichi Nakao
  • Patent number: 7948094
    Abstract: The semiconductor device according to the present invention includes a semiconductor layer, an interlayer dielectric film formed on the semiconductor layer, a wire formed on the interlayer dielectric film with a metallic material to have a width of not more than 0.4 ?m, and a broad portion integrally formed on the wire to extend from the wire in the width direction thereof.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: May 24, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Satoshi Kageyama, Yuichi Nakao
  • Publication number: 20110045669
    Abstract: The method of manufacturing a semiconductor device according to the present invention includes: an insulating layer forming step of forming an insulating layer made of an insulating material containing Si and O; a groove forming step of forming a groove in the insulating layer; a metal film applying step of covering the inner surface of the groove with a metal film made of MnOx (x: a number greater than zero) by sputtering; and a wire forming step of forming a Cu wire made of a metallic material mainly composed of Cu on the metal film.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 24, 2011
    Applicant: ROHM CO., LTD.
    Inventors: Yuichi Nakao, Satoshi Kageyama
  • Publication number: 20100283125
    Abstract: The semiconductor device according to the present invention includes a lower electrode made of a metallic material, a capacitance film made of an insulating material and laminated on the lower electrode, an upper electrode made of a metallic material, opposed to the lower electrode through the capacitance film, and having an outline smaller than that of the lower electrode in plan view along the opposed direction, and a protective film made of the same material as that of the capacitance film and laminated on the upper electrode.
    Type: Application
    Filed: July 15, 2010
    Publication date: November 11, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Ryotaro Yagi, Yuichi Nakao, Isamu Nishimura
  • Publication number: 20100270686
    Abstract: The semiconductor device according to the present invention includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern embedded in a wire-forming region of the first insulating layer, a second insulating layer laminated on the first insulating layer, a second metal wiring pattern embedded in a wire-forming region of the second insulating layer and first dummy metal patterns embedded each in a wire-opposed region opposing to the wire-forming region of the second insulating layer and in a non-wire-opposed region opposing to a non-wire-forming region other than the wire-forming region of the second insulating layer, the wire-opposed region and the non-wire-opposed region each in a non-wire-forming region other than the wire-forming region of the first insulating layer.
    Type: Application
    Filed: July 2, 2010
    Publication date: October 28, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yuichi Nakao, Satoshi Kageyama, Masaru Naitou
  • Patent number: 7781863
    Abstract: The semiconductor device according to the present invention includes a lower electrode made of a metallic material, a capacitance film made of an insulating material and laminated on the lower electrode, an upper electrode made of a metallic material, opposed to the lower electrode through the capacitance film, and having an outline smaller than that of the lower electrode in plan view along the opposed direction, and a protective film made of the same material as that of the capacitance film and laminated on the upper electrode.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: August 24, 2010
    Assignee: ROHM Co., Ltd.
    Inventors: Ryotaro Yagi, Yuichi Nakao, Isamu Nishimura
  • Patent number: 7777340
    Abstract: The semiconductor device according to the present invention includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern embedded in a wire-forming region of the first insulating layer, a second insulating layer laminated on the first insulating layer, a second metal wiring pattern embedded in a wire-forming region of the second insulating layer and first dummy metal patterns embedded each in a wire-opposed region opposing to the wire-forming region of the second insulating layer and in a non-wire-opposed region opposing to a non-wire-forming region other than the wire-forming region of the second insulating layer, the wire-opposed region and the non-wire-opposed region each in a non-wire-forming region other than the wire-forming region of the first insulating layer.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: August 17, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Yuichi Nakao, Satoshi Kageyama, Masaru Naitou
  • Publication number: 20100190335
    Abstract: In a method of manufacturing a semiconductor device according to the present invention, a wiring trench is formed on the surface of an insulating film, and the inner surface of this wiring trench is thereafter coated with an alloy film made of an alloy material containing copper and a prescribed metallic element. After this coating with the alloy film, a copper film is laminated on the insulating film to fill up the wiring trench. Then, unnecessary portions of the copper film outside the wiring trench are removed, so that the surface of the copper film remaining in the wiring trench is generally flush with the surface of the insulating film. Thereafter heat treatment is performed. The prescribed metallic element is deposited on the wiring trench due to this heat treatment. Then, the prescribed metallic element deposited on the wiring trench is removed.
    Type: Application
    Filed: March 15, 2010
    Publication date: July 29, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yuichi Nakao, Takahisa Yamaha
  • Patent number: 7739920
    Abstract: A first inlet portion, a second inlet portion, a first outlet portion, and a second outlet portion are fixed to a fixing member, and a connecting tube portion is provided between the first outlet portion and the second inlet portion. Further, the first inlet portion and the second inlet portion 6 are arranged in a non-parallel state such that the distance between the two increases as they depart from the fixing member. The first outlet portion and the second outlet portion are similarly arranged in a non-parallel state, the first inlet portion and the second inlet portion and the first outlet portion and the second outlet portion being arranged symmetrically. Further, the first outlet portion, the second inlet portion, and the connecting tube portion are arranged such that their three tube axes are in a straight line.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: June 22, 2010
    Assignee: Oval Corporation
    Inventors: Hirokazu Kitami, Yuichi Nakao, Norio Sukemura
  • Patent number: 7726202
    Abstract: A tertiary mode vibration type Coriolis flowmeter includes a flow tube, a drive device driving the flow tube, and a pair of vibration detecting sensors detecting a phase difference in proportion to a Colioris force acting on the flow tube. The drive device drives the flow tube by bending vibration in a tertiary mode. The flow tube further comprises an approximately loop-shaped body part. A pair of parallel leg parts deflected in a direction approximately orthogonal to the vibrating direction of both end parts of the body part, namely, to the outside of the both end parts are formed continuously with the both end parts of the body part. Fixed end parts supporting the flow tube are formed at the leg parts.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: June 1, 2010
    Assignee: Oval Corporation
    Inventor: Yuichi Nakao
  • Publication number: 20100117232
    Abstract: The semiconductor device according to the present invention includes a first insulating layer made of a material containing Si and O, a groove shaped by digging down the first insulating layer, an embedded body, embedded in the groove, made of a metallic material mainly composed of Cu, a second insulating layer, stacked on the first insulating layer and the embedded body, made of a material containing Si and O, and a barrier film, formed between the embedded body and each of the first insulating layer and the second insulating layer, made of MnxSiyOz (x, y and z: numbers greater than zero).
    Type: Application
    Filed: June 20, 2008
    Publication date: May 13, 2010
    Inventor: Yuichi Nakao
  • Patent number: 7698956
    Abstract: A Coriolis flow meter (11) with a vibrating direction restriction means includes flow tubes (13, 13), a drive means (14) for driving the flow tubes (13, 13), and phase difference detection means (15, 15) for detecting a phase difference in proportion to a Coriolis force. The Coriolis flow meter further includes plate springs (16, 16) functioning as vibrating direction restriction means, and a flow tube fixing member (17) also functioning as a vibrating direction restriction means and serving to fix the flow tubes (13, 13) in position.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: April 20, 2010
    Assignee: Oval Corporation
    Inventor: Yuichi Nakao
  • Patent number: 7694585
    Abstract: A straight tube type Coriolis flowmeter is equipped with a straight-tube-type flow tube, a drive device for driving by a tertiary mode vibration, a pair of detection unit for detecting a phase difference proportional to a Coriolis force, a pedestal having rigidity, and elastic connection members having elasticity. Assuming that an axial direction of the flow tube is a Z-axis, that a driving direction of the drive device is an X-axis, and that a direction orthogonal to the Z-axis and the X-axis is a Y-axis, the elastic connection members are of a structure exhibiting lower rigidity in the Z-axis direction than in the X-axis direction and the Y-axis direction, and exhibiting lower rigidity in a direction of rotation around the Y-axis than in a direction of rotation around the Z-axis and a direction of rotation around the X-axis.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 13, 2010
    Assignee: Oval Corporation
    Inventor: Yuichi Nakao
  • Publication number: 20100078780
    Abstract: A semiconductor device according to the present invention includes: a wiring; an interlayer insulating film formed over the wiring and having an opening reaching the wiring from a top surface thereof; an intra-opening metal film formed on the wiring inside the opening and made of a metal material that contains aluminum; a top surface metal film formed over the interlayer insulating film and made of the metal material; and a conduction securing film formed on a side surface of the opening to secure conduction between the intra-opening metal film and top surface metal film.
    Type: Application
    Filed: September 25, 2009
    Publication date: April 1, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yuichi Nakao, Ryosuke Nakagawa
  • Publication number: 20100078702
    Abstract: A semiconductor storage device according to the present invention includes: a semiconductor substrate; an embedded insulator embedded in a trench formed in the semiconductor substrate and having an upper portion protruding above a top surface of the semiconductor substrate; a first insulating film formed on the top surface of the semiconductor substrate; a floating gate formed on the first insulating film at a side of the embedded insulator, having a side portion arching out above the embedded insulator, and having a side surface made of a flat surface and a curved surface continuing below the flat surface; a second insulating film contacting an upper surface, the flat surface and the curved surface of the floating gate; and a control gate opposing the upper surface, the flat surface and the curved surface of the floating gate across the second insulating film.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 1, 2010
    Applicant: ROHM CO., LTD.
    Inventor: Yuichi Nakao
  • Publication number: 20100078693
    Abstract: The semiconductor device according to the present invention includes a ferroelectric film and an electrode stacked on the ferroelectric film. The electrode has a multilayer structure of an electrode lower layer in contact with the ferroelectric film and an electrode upper layer stacked on the electrode lower layer. The electrode upper layer is made of a conductive material having an etching selection ratio with respect to the materials for the ferroelectric film and the electrode lower layer. The upper surface of the electrode upper layer is planarized.
    Type: Application
    Filed: September 25, 2009
    Publication date: April 1, 2010
    Applicant: ROHM CO., LTD.
    Inventor: Yuichi Nakao
  • Publication number: 20100032837
    Abstract: A semiconductor device according to the present invention includes: a semiconductor substrate; a first copper interconnection provided on the semiconductor substrate; an insulating layer provided over the first copper interconnection and having a hole extending therethrough to the first copper interconnection; a barrier layer composed of a tantalum-containing material and covering at least a sidewall of the hole and a part of the first copper interconnection exposed in the hole; and a second copper interconnection provided in intimate contact with the barrier layer and electrically connected to the first copper interconnection via the barrier layer; wherein the barrier layer has a nitrogen concentration profile such that the concentration of nitrogen contained in the material varies to be lower in a boundary portion of the barrier layer adjacent to the first copper interconnection and in a boundary portion of the barrier layer adjacent to the second copper interconnection and higher in an intermediate portion
    Type: Application
    Filed: October 11, 2007
    Publication date: February 11, 2010
    Applicant: ROHM CO., LTD
    Inventors: Ryosuke Nakagawa, Takahisa Yamaha, Yuichi Nakao, Katsumi Sameshima, Satoshi Kageyama
  • Publication number: 20100035428
    Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a groove forming step of forming a groove in an insulating layer made of an insulating material containing Si and O; an alloy film applying step of covering the side surface and the bottom surface of the groove with an alloy film made of an alloy material containing Cu and Mn by sputtering; a thinning step of reducing the thickness of a portion of the alloy film covering the bottom surface of the groove; a wire forming step of forming a Cu wire made of a metallic material mainly composed of Cu in the groove after the thinning step; and a barrier film forming step of forming a barrier film made of MnSiO between the Cu wire and the insulating layer by heat treatment.
    Type: Application
    Filed: August 4, 2009
    Publication date: February 11, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Yuichi NAKAO, Satoshi Kageyama, Yoshihisa Takada