Patents by Inventor Yuichi Satou

Yuichi Satou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8171355
    Abstract: Disclosed is a communication system that transmits data through a transmission path between a transmission side apparatus and a reception side apparatus, wherein the transmission side apparatus comprises a coding apparatus that creates redundantly-coded data from original data; a transmitting apparatus that sends the coded data coded by the coding unit to the transmission path; and a coding rate determining apparatus that sets and controls a coding rate in the coding unit, wherein the reception side apparatus comprises a receiving apparatus that receives the coded data sent through the transmission path; a decoding apparatus that decodes the original data from the coded data received; and a loss rate estimating apparatus that measures the loss rate on the path of the coded data sent, and wherein the coding rate determining apparatus of the transmission side apparatus varies and controls the coding rate in the coding apparatus based on the loss rate obtained.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: May 1, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Kameyama, Yuichi Satou, Takehiko Fujiyama, Yuuichi Terui, Kaname Yoshida
  • Publication number: 20070260850
    Abstract: Disclosed is a communication system that transmits data through a transmission path between a transmission side apparatus and a reception side apparatus, wherein the transmission side apparatus comprises a coding apparatus that creates redundantly-coded data from original data; a transmitting apparatus that sends the coded data coded by the coding unit to the transmission path; and a coding rate determining apparatus that sets and controls a coding rate in the coding unit, wherein the reception side apparatus comprises a receiving apparatus that receives the coded data sent through the transmission path; a decoding apparatus that decodes the original data from the coded data received; and a loss rate estimating apparatus that measures the loss rate on the path of the coded data sent, and wherein the coding rate determining apparatus of the transmission side apparatus varies and controls the coding rate in the coding apparatus based on the loss rate obtained.
    Type: Application
    Filed: July 21, 2006
    Publication date: November 8, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroaki Kameyama, Yuichi Satou, Takehiko Fujiyama, Yuuichi Terui, Kaname Yoshida
  • Publication number: 20070253548
    Abstract: The data dividing unit divides data into n pieces. An encoding unit generates m pieces of encoded data composed of a set of a bitmap matrix specifying a plurality pieces of divided data for obtaining exclusive OR (XOR) and exclusive OR data including exclusive OR of the plurality pieces of divided data specified by the bitmap matrix, wherein m is equal to or more than a dividing number n and according to redundancy. A distributed saving unit distributes and saves the m pieces of encoded data to and in storage devices at two or more locations and m or less locations. A decoding unit restores the original data by retrieving restorable k or more pieces of the encoded data among the distributed and saved m pieces of encoded data and subjecting the bitmap matrix of the retrieved encoded data to conversion into a unit matrix.
    Type: Application
    Filed: August 30, 2006
    Publication date: November 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroaki Kameyama, Yuichi Satou, Shinichi Sazawa
  • Patent number: 6825070
    Abstract: A single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst process, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section of a peripheral driving circuit integration type LCD. A single crystal silicon thin film having high electron/hole mobility is formed into a uniform film at a relatively low temperature, which enables the manufacturing of an active matrix substrate incorporated with a high-performance driver which can be used in a TFT display.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: November 30, 2004
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Publication number: 20030071309
    Abstract: Single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst PVD process or the like, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section-peripheral driving circuit integration type LCD.
    Type: Application
    Filed: November 22, 2002
    Publication date: April 17, 2003
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6521525
    Abstract: An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having good lattice compatibility with manocrystalline silicon is formed over the gate insulation film. A layer of monocrystalline silicon is formed over the substance layer. Manocrystalline silicon is heteroepitaxially grown by catalytic CVD or the like using a crystalline sapphire film formed on the substrate to form the monocrystalline silicon layer. The monocrystalline silican layer is used as a dual gate MOSTFT of the electro-optic device.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: February 18, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6504215
    Abstract: A single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst process, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section of a peripheral driving circuit integration type LCD. A single crystal silicon thin film having high electron/hole mobility is formed into a uniform film at a relatively low temperature, which enables the manufacturing of an active matrix substrate incorporated with a high-performance driver which can be used in a TFT display.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: January 7, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6399429
    Abstract: Single-crystal silicon is deposited on an insulating substrate (1) with a crystalline sapphire layer (50) formed thereon as a seed, to form a silicon epitaxial layer (7). P-type impurity ions are implanted into a single-crystal silicon layer, and then N-type impurity ions are implanted to make a P-channel MOS transistor portion a single-crystal silicon layer (14). In a single-crystal silicon layer (11), an N+ source region (20) and drain region (21) of an N-channel MOS transistor are formed. Thus, a silicon layer is epitaxially grown uniformly at low temperatures.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: June 4, 2002
    Assignee: Sony Corporation
    Inventors: Hisayoshi Yamoto, Hideo Yamanaka, Yuichi Satou, Hajime Yagi
  • Publication number: 20020056837
    Abstract: To form a monocrystalline silicon thin film having high electron/hole mobility uniformly at relatively low temperature, to permit manufacture of an electro-optic device such as a semiconductor device for a display using this monocrystalline silicon film, to permit manufacture of a nMOS or pMOSTFT display unit comprising an LDD having high switching performance and low leak current, and a peripheral circuit comprising a cMOS, n or pMOSTFT, or a combination thereof, of high drive performance, in a one-piece construction, thereby realizing a display panel having high image quality, fine detail, narrow frame edge, wide screen, high efficiency and large screen size wherein even a large glass substrate of relatively low strain point may be used, productivity is high, there is no need for costly equipment thereby permitting cost reductions, adjustment of threshold value is easy, and fast operation is possible due to reduction of resistance.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 16, 2002
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6346718
    Abstract: An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having good lattice compatibility with monocrystalline silicon is formed over the gate insulation film. A layer of monocrystalline silicon is formed over the substance layer. Monocrystalline silicon is heteroepitaxially grown by catalytic CVD or the like using a crystalline sapphire film formed on the substrate to form the monocrystalline silicon layer. The monocrystalline silicon layer is used as a dual gate MOSTFT of the electro-optic device.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: February 12, 2002
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi