Patents by Inventor Yuichi Takebayashi
Yuichi Takebayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240109626Abstract: A ship monitoring system makes it easier to grasp a heading of another ship, and includes a first data generating part, a second data generating part, and processing circuitry. The first data generating part generates first ship data indicative of a position and a velocity of a first ship. The second data generating part generates second ship data indicative of a position and a velocity of a second ship. The processing circuitry calculates a risk value indicative of a risk of the first ship and the second ship colliding each other, for each point on an estimated course of the second ship, based on the first ship data and the second ship data, when assuming that the first ship changes the course and reaches the point. The processing circuitry displays a risk area indicative of a heading of the second ship at the point where the risk value is more than a threshold.Type: ApplicationFiled: December 13, 2023Publication date: April 4, 2024Applicant: Furuno Electric Co., Ltd.Inventors: Yuichi TAKEBAYASHI, Kazuya NAKAGAWA, Seiichi UOSHITA, Yuta TAKAHASHI, Makoto YOSHINAGA
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Publication number: 20230296765Abstract: The present disclosure provides a ship monitoring system capable of improving legibility of an OZT. The ship monitoring system includes a first data generator, a second data generator, and processing circuitry. The first data generator generates first ship data indicative of a position and a velocity of a first ship. The second data generator generates second ship data indicative of a position and a velocity of a second ship. The processing circuitry calculates a risk value indicative of a risk of a collision between the first ship and the second ship based on the first ship data and the second ship data, for each point on an estimated course of the second ship, when the first ship is assumed to change a course and reach the point. The processing circuitry specifies a range where two or more continuous points have the risk values above a threshold. The processing circuitry displays a risk range including the range where the two or more continuous points have the risk values above the threshold.Type: ApplicationFiled: April 20, 2023Publication date: September 21, 2023Applicant: Furuno Electric Co., Ltd.Inventors: Seiichi UOSHITA, Kazuya NAKAGAWA, Yuichi TAKEBAYASHI
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Publication number: 20230278681Abstract: The present disclosure provides a ship monitoring system capable of visualizing a risk of a collision or an approach in a width direction perpendicular to a heading of another ship. The ship monitoring system includes a first data generator, a second data generator, and processing circuitry. The first data generator generates first ship data indicative of a position and a velocity of a first ship. The second data generator generates second ship data indicative of a position and a velocity of a second ship. The processing circuitry specifies a risk range where a risk value indicative of a risk of a collision between the first ship and the second ship is above a threshold among an estimated course of the second ship, based on a position of the first ship and a position of the second ship at each timing, that are estimated from the first ship data and the second ship data, when assuming that the first ship changes a course to an arbitrary direction and crosses the estimated course of the second ship.Type: ApplicationFiled: May 12, 2023Publication date: September 7, 2023Applicant: Furuno Electric Co., Ltd.Inventors: Kazuya NAKAGAWA, Yuichi TAKEBAYASHI
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Publication number: 20230260406Abstract: The present disclosure provides a ship monitoring system capable of appropriately evaluating risks of collisions for a plurality of other ships which constitute a convoy. The ship monitoring system includes a first data generator, a second data generator, and processing circuitry. The first data generator generates first ship data indicative of a position and a velocity of a first ship. The second data generator generates a plurality of second ship data indicative of positions and velocities of a plurality of second ships. The processing circuitry calculates a risk value indicative of a risk of a collision between the first ship and each of the plurality of second ships based on the first ship data and the plurality of second ship data. The processing circuitry determines whether the plurality of second ships are a convoy based on the plurality of second ship data.Type: ApplicationFiled: April 26, 2023Publication date: August 17, 2023Applicant: Furuno Electric Co., Ltd.Inventor: Yuichi TAKEBAYASHI
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Patent number: 9577604Abstract: An electronic component includes: an oscillation circuit that is electrically connected to a resonator element; and a substrate that includes a first surface on which the oscillation circuit and wiring that is electrically connected with the resonator element and the oscillation circuit to form an oscillation loop are disposed, and a second surface opposite to the first surface. The substrate includes a conductor layer between the first surface and the second surface. The conductor layer overlaps the wiring in a plan view. A distance between the wiring and the conductor layer in a thickness direction as a direction along a direction intersecting the first surface and the second surface is from 0.35 mm to 0.7 mm.Type: GrantFiled: May 10, 2016Date of Patent: February 21, 2017Assignee: Seiko Epson CorporationInventors: Yuichi Takebayashi, Koji Hosaka, Yoshiyuki Yamaguchi
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Publication number: 20160254798Abstract: An electronic component includes: an oscillation circuit that is electrically connected to a resonator element; and a substrate that includes a first surface on which the oscillation circuit and wiring that is electrically connected with the resonator element and the oscillation circuit to form an oscillation loop are disposed, and a second surface opposite to the first surface. The substrate includes a conductor layer between the first surface and the second surface. The conductor layer overlaps the wiring in a plan view. A distance between the wiring and the conductor layer in a thickness direction as a direction along a direction intersecting the first surface and the second surface is from 0.35 mm to 0.7 mm.Type: ApplicationFiled: May 10, 2016Publication date: September 1, 2016Inventors: Yuichi TAKEBAYASHI, Koji HOSAKA, Yoshiyuki YAMAGUCHI
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Patent number: 9391560Abstract: A semiconductor integrated circuit includes a semiconductor substrate on which an oscillation circuit that generates an oscillation signal by oscillating a resonation element, and a plurality of output circuits that outputs signals based on the oscillation signal, are integrated. A package contains the semiconductor integrated circuit and the resonation element. In the semiconductor integrated circuit, an operation of a first output circuit and an operation of a second output circuit, among a plurality of output circuits, are controlled independently from each other.Type: GrantFiled: April 17, 2015Date of Patent: July 12, 2016Assignee: Seiko Epson CorporationInventors: Yuichi Takebayashi, Mikio Shigemori, Takuya Owaki, Kunihito Yamanaka
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Patent number: 9362886Abstract: An electronic component includes: an oscillation circuit that is electrically connected to a resonator element; and a substrate that includes a first surface on which the oscillation circuit and wiring that is electrically connected with the resonator element and the oscillation circuit to form an oscillation loop are disposed, and a second surface opposite to the first surface. The substrate includes a conductor layer between the first surface and the second surface. The conductor layer overlaps the wiring in a plan view. A distance between the wiring and the conductor layer in a thickness direction as a direction along a direction intersecting the first surface and the second surface is from 0.35 mm to 0.7 mm.Type: GrantFiled: September 1, 2015Date of Patent: June 7, 2016Assignee: Seiko Epson CorporationInventors: Yuichi Takebayashi, Koji Hosaka, Yoshiyuki Yamaguchi
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Publication number: 20160065170Abstract: An electronic component includes: an oscillation circuit that is electrically connected to a resonator element; and a substrate that includes a first surface on which the oscillation circuit and wiring that is electrically connected with the resonator element and the oscillation circuit to form an oscillation loop are disposed, and a second surface opposite to the first surface. The substrate includes a conductor layer between the first surface and the second surface. The conductor layer overlaps the wiring in a plan view. A distance between the wiring and the conductor layer in a thickness direction as a direction along a direction intersecting the first surface and the second surface is from 0.35 mm to 0.7 mm.Type: ApplicationFiled: September 1, 2015Publication date: March 3, 2016Inventors: Yuichi TAKEBAYASHI, Koji HOSAKA, Yoshiyuki YAMAGUCHI
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Publication number: 20150303872Abstract: A semiconductor integrated circuit includes a semiconductor substrate on which an oscillation circuit that generates an oscillation signal by oscillating a resonation element, and a plurality of output circuits that outputs signals based on the oscillation signal, are integrated. A package contains the semiconductor integrated circuit and the resonation element. In the semiconductor integrated circuit, an operation of a first output circuit and an operation of a second output circuit, among a plurality of output circuits, are controlled independently from each other.Type: ApplicationFiled: April 17, 2015Publication date: October 22, 2015Inventors: Yuichi TAKEBAYASHI, Mikio SHIGEMORI, Takuya OWAKI, Kunihito YAMANAKA
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Publication number: 20150255702Abstract: An electronic device includes a base substrate in which first and second substrates are laminated and a lid which is bonded to the base substrate. The base substrate includes notched portions which are provided on lateral sides and castellations which are disposed in the notched portions. The lid includes a main body which is disposed so as to face the base substrate, and claw portions, protruding from the main body, which are disposed within the notched portions. A length of the claw portions is equal to or less than a thickness of the first substrate.Type: ApplicationFiled: March 6, 2015Publication date: September 10, 2015Inventors: Yuichi TAKEBAYASHI, Yoshiaki MATSUMOTO
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Publication number: 20150256127Abstract: An electronic device includes a base material provided with a concave portion and a support substrate provided with lateral sides. The support substrate is located so as to overlap the concave portion when seen in plan view, and is bonded to an upper surface of the base material through solders at a plurality of places except both ends of the lateral side and a plurality of places except both ends of the lateral side.Type: ApplicationFiled: March 6, 2015Publication date: September 10, 2015Inventors: Yuichi TAKEBAYASHI, Yoshiaki MATSUMOTO
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Patent number: 8513862Abstract: A package structure realizing a size and/or thickness reduction and suitable for packaging a surface acoustic wave element is provided. The package structure for solving the above challenge includes a base having a thick floor on which to place a surface acoustic wave element and a thin floor on which to place an electronic component, the surface acoustic wave element and the electronic component being mounted close to each other on the plane coordinate system. In addition, in the package structure described above, the difference in height between the thin floor and the thick floor is the same as, or larger than, the thickness of the electronic component mounted on the thin floor.Type: GrantFiled: April 20, 2012Date of Patent: August 20, 2013Assignee: Seiko Epson CorporationInventor: Yuichi Takebayashi
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Publication number: 20120206871Abstract: A package structure realizing a size and/or thickness reduction and suitable for packaging a surface acoustic wave element is provided. The package structure for solving the above challenge includes a base having a thick floor on which to place a surface acoustic wave element and a thin floor on which to place an electronic component, the surface acoustic wave element and the electronic component being mounted close to each other on the plane coordinate system. In addition, in the package structure described above, the difference in height between the thin floor and the thick floor is the same as, or larger than, the thickness of the electronic component mounted on the thin floor.Type: ApplicationFiled: April 20, 2012Publication date: August 16, 2012Applicant: SEIKO EPSON CORPORATIONInventor: Yuichi TAKEBAYASHI
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Patent number: 8191228Abstract: A method of manufacturing a surface acoustic wave device including a surface acoustic wave element and an electronic component on a package, the method including a component mounting step including mounting the electronic component on the package; an element mounting step including mounting the surface acoustic wave element on the package; an annealing step; a wire bonding step including wire bonding at least one of the electronic component and surface wave element to the package, the wire bonding step being performed after the annealing step.Type: GrantFiled: July 25, 2007Date of Patent: June 5, 2012Assignee: Seiko Epson CorporationInventor: Yuichi Takebayashi
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Patent number: 7436105Abstract: A package structure realizing a size and/or thickness reduction and suitable for packaging a surface acoustic wave element is provided. The package structure for solving the above challenge includes a base having a thick floor 16b on which to place a surface acoustic wave element 12 and a thin floor 16a on which to place an electronic component 14, the surface acoustic wave element and the electronic component being mounted close to each other on the plane coordinate system. In addition, in the package structure described above, the difference in height between the thin floor 16a and the thick floor 16b is the same as, or larger than, the thickness of the electronic component mounted on the thin floor 16a.Type: GrantFiled: February 15, 2006Date of Patent: October 14, 2008Assignee: Seiko Epson CorporationInventor: Yuichi Takebayashi
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Publication number: 20080016665Abstract: A package structure realizing a size and/or thickness reduction and suitable for packaging a surface acoustic wave element is provided. The package structure for solving the above challenge includes a base having a thick floor 16b on which to place a surface acoustic wave element 12 and a thin floor 16a on which to place an electronic component 14, the surface acoustic wave element and the electronic component being mounted close to each other on the plane coordinate system. In addition, in the package structure described above, the difference in height between the thin floor 16a and the thick floor 16b is the same as, or larger than, the thickness of the electronic component mounted on the thin floor 16a.Type: ApplicationFiled: July 25, 2007Publication date: January 24, 2008Applicant: Seiko Epson CorporationInventor: Yuichi Takebayashi
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Publication number: 20060207915Abstract: A package structure realizing a size and/or thickness reduction and suitable for packaging a surface acoustic wave element is provided. The package structure for solving the above challenge includes a base having a thick floor 16b on which to place a surface acoustic wave element 12 and a thin floor 16a on which to place an electronic component 14, the surface acoustic wave element and the electronic component being mounted close to each other on the plane coordinate system. In addition, in the package structure described above, the difference in height between the thin floor 16a and the thick floor 16b is the same as, or larger than, the thickness of the electronic component mounted on the thin floor 16a.Type: ApplicationFiled: February 15, 2006Publication date: September 21, 2006Applicant: SEIKO EPSON CORPORATIONInventor: Yuichi Takebayashi