Abstract: This invention configures a semiconductor memory device in the following manner. The semiconductor contains a first memory part and more than one redundant circuit that is used when the first memory part is faulty, and each redundant circuit memorizes in its status memory part whether a second memory part which becomes a spare cell is in a not-in-use status, in an in-use status or in an out-of-use status, which means that a failure exists in the second memory part. If a second memory part is in the out-of-use status, its access is prohibited, and the other second memory part without a failure is accessed. With this configuration, when a spare cell is confirmed to have a failure after the spare cell is programmed, the spare cell is put in the out-of-use status, thereby preventing the spare cell from being accessed. Consequently, the yield of the semiconductor device is increased.

Abstract: A semiconductor memory device comprises a first memory comprising memory cells for prestoring fixed data, a decoder for decoding an input address and for reading out a fixed data from the first memory based on a decoded input address, a second memory for storing a data identical to that prestored in a defective memory cell of the first memory, where the second memory comprising programmable non-volatile memory cells, a discriminating part including a third memory for storing a redundant address of each defective memory cell of the first memory for discriminating whether or not the input address coincides with the redundant address and for outputting a discrimination signal when the input address coincides with the redundant address, and a selecting part supplied with data read out from the first and second memories for normally outputting the data read out from the first memory and selectively outputting the data from the second memory when the discrimination signal is received from the discriminating part.