Abstract: Provided is a control rod motion monitoring method and a control rod motion monitoring system, in which a control rod insertion in an entire core is monitored at all time during operation of a reactor and, when an abnormality occurs, a signal is issued to a countermeasure device that automatically starts operation and an alarm is issued to prompt operation of an operator. An LPRM detector in an LPRM assembly of the entire core is divided into four channels for each height; indicated values are averaged at all time; the average indicated value is compared with a set point; and a signal is issued to a countermeasure device when an abnormality occurs.

Abstract: Provided is a method for producing a processed food, in which the generation of a sulfur smell or the imparting of an unpleasant flavor like an accumulated sulfur smell is suppressed. [Means for Resolution] Provided is a method for producing a processed food in which the generation of a sulfur smell is suppressed, including the following steps (A) and (B): (A) a step of bringing a transglutaminase and/or a reducing sugar into contact with a solid food material containing a protein as a main nutritional component; and (B) a step of subjecting the food material after the step (A) to a heat sterilization treatment.

Abstract: Provided is a control rod motion monitoring method and a control rod motion monitoring system, in which a control rod insertion in an entire core is monitored at all time during operation of a reactor and, when an abnormality occurs, a signal is issued to a countermeasure device that automatically starts operation and an alarm is issued to prompt operation of an operator. An LPRM detector in an LPRM assembly of the entire core is divided into four channels for each height; indicated values are averaged at all time; the average indicated value is compared with a set point; and a signal is issued to a countermeasure device when an abnormality occurs.

Abstract: A capacitor charger is provided that can control charging voltage with high accuracy, and repeat a process of increasing it to a target charging voltage at high speed. In a first step, an ac voltage is generated in a resonant type inverter section by fixed frequency driving pulses, the ac voltage is converted to a dc voltage, a load capacitor is charged by the dc voltage, a calculation pulse in the driving pulse has a predetermined, fixed driving pulse width, and the load capacitor is charged by &Dgr;Vn each pulse. In a second step, when the charging voltage V1 of the load capacitor and the target voltage V2 satisfy an inequality relationship “V2>V1>V2−&Dgr;Vn”, charging is performed by a single or a plurality of final pulses having a driving pulse width W2 (W1>W2) as required to step up the voltage by “V2−V1”.

Abstract: A radio communication analyzer can test a radio device under test which corresponds to one of a plurality of types of digital communication systems in accordance with the digital communication system to which the radio device under test corresponds. The radio communication analyzer includes a modulation section, a demodulation section, a modulation/demodulation processing section, and a control section. The modulation section has a first rewritable memory, and converts modulation data indicating the contents of a first test signal to be transmitted to the radio device under test into a digital modulated signal by executing a program written in the first memory. The demodulation section has a second rewritable memory, and generates demodulated data from a second test signal received from the radio device under test by executing a program written in the second memory. The modulation/demodulation processing section has a third memory.

Abstract: A radio communication analyzer can test a radio device under test which corresponds to one of a plurality of types of digital communication systems in accordance with the digital communication system to which the radio device under test corresponds. The radio communication analyzer includes a modulation section, a demodulation section, a modulation/demodulation processing section, and a control section. The modulation section has a first rewritable memory, and converts modulation data indicating the contents of a first test signal to be transmitted to the radio device under test into a digital modulated signal by executing a program written in the first memory. The demodulation section has a second rewritable memory, and generates demodulated data from a second test signal received from the radio device under test by executing a program written in the second memory. The modulation/demodulation processing section has a third memory.