Patents by Inventor Yuji Kunimoto
Yuji Kunimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10477703Abstract: A wiring board includes an insulator layer, a wiring layer including a wiring pattern and formed on one surface of the insulator layer, an inorganic layer covering a region of the one surface of the insulator layer not formed with the wiring layer, and covering an upper surface and side surfaces of the wiring pattern along a concavo-convex of the wiring pattern, and a shield part covering the wiring pattern via the inorganic layer.Type: GrantFiled: October 16, 2018Date of Patent: November 12, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yuji Kunimoto
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Publication number: 20190191572Abstract: A wiring board includes an insulator layer, a wiring layer including a wiring pattern and formed on one surface of the insulator layer, an inorganic layer covering a region of the one surface of the insulator layer not formed with the wiring layer, and covering an upper surface and side surfaces of the wiring pattern along a concavo-convex of the wiring pattern, and a shield part covering the wiring pattern via the inorganic layer.Type: ApplicationFiled: October 16, 2018Publication date: June 20, 2019Inventor: Yuji KUNIMOTO
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Patent number: 10134680Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.Type: GrantFiled: August 14, 2017Date of Patent: November 20, 2018Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
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Publication number: 20170365559Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.Type: ApplicationFiled: August 14, 2017Publication date: December 21, 2017Inventors: Takaharu YAMANO, Hajime IIZUKA, Hideaki SAKAGUCHI, Toshio KOBAYASHI, Tadashi ARAI, Tsuyoshi KOBAYASHI, Tetsuya KOYAMA, Kiyoaki IIDA, Tomoaki MASHIMA, Koichi TANAKA, Yuji KUNIMOTO, Takashi YANAGISAWA
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Patent number: 9824963Abstract: A wiring board includes: a core substrate including: a metal plate having first through holes; a first insulating layer covering an upper surface and a lower surface of the metal plate and inner wall surfaces of the first through holes; through electrodes penetrating the first insulating layer in a thickness direction and each having an upper end surface; a first wiring layer formed on a lower surface of the first insulating layer and connected to the through electrodes; a wiring structure formed on an upper surface of the first insulating layer; and an outermost insulating layer formed on a lower surface of the core substrate. A wiring density of the wiring structure is higher than that of the core substrate. The metal plate is located at a side of the wiring structure with respect to a center of the first insulating layer in a thickness direction thereof.Type: GrantFiled: December 13, 2016Date of Patent: November 21, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yuji Kunimoto
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Patent number: 9768122Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.Type: GrantFiled: August 19, 2016Date of Patent: September 19, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
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Patent number: 9736941Abstract: A wiring substrate includes an insulating layer, a stack including wiring layers and photosensitive-resin insulating layers on a first surface of the insulating layer, a wiring layer on a second surface of the insulating layer, having a lower wiring density than the wiring layers, a metal core plate buried in the insulating layer and positioned on the stack side with respect to the center of the insulating layer in its thickness direction, and a via wiring buried in the insulating layer to have a first end face exposed at the first surface and joined to the lowermost one of the wiring layers, and a second end face joined to the metal core plate. The first surface and the first end face are substantially flush with each other. The wiring layers include a signal line, and a ground line concentrically formed around the signal line, with a predetermined interval therebetween.Type: GrantFiled: March 10, 2017Date of Patent: August 15, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yuji Kunimoto
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Publication number: 20170179013Abstract: A wiring board includes: a core substrate including: a metal plate having first through holes; a first insulating layer covering an upper surface and a lower surface of the metal plate and inner wall surfaces of the first through holes; through electrodes penetrating the first insulating layer in a thickness direction and each having an upper end surface; a first wiring layer formed on a lower surface of the first insulating layer and connected to the through electrodes; a wiring structure formed on an upper surface of the first insulating layer; and an outermost insulating layer formed on a lower surface of the core substrate. A wiring density of the wiring structure is higher than that of the core substrate. The metal plate is located at a side of the wiring structure with respect to a center of the first insulating layer in a thickness direction thereof.Type: ApplicationFiled: December 13, 2016Publication date: June 22, 2017Inventor: Yuji Kunimoto
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Patent number: 9646926Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.Type: GrantFiled: June 1, 2016Date of Patent: May 9, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
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Publication number: 20160358858Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.Type: ApplicationFiled: August 19, 2016Publication date: December 8, 2016Inventors: Takaharu YAMANO, Hajime IIZUKA, Hideaki SAKAGUCHI, Toshio KOBAYASHI, Tadashi ARAI, Tsuyoshi KOBAYASHI, Tetsuya KOYAMA, Kiyoaki IIDA, Tomoaki MASHIMA, Koichi TANAKA, Yuji KUNIMOTO, Takashi YANAGISAWA
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Publication number: 20160276259Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.Type: ApplicationFiled: June 1, 2016Publication date: September 22, 2016Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
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Patent number: 9451702Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.Type: GrantFiled: July 1, 2014Date of Patent: September 20, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
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Patent number: 9412687Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.Type: GrantFiled: June 9, 2015Date of Patent: August 9, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
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Patent number: 9332658Abstract: A wiring board includes first and second insulating layers, first and second through holes, a via, a plane layer, and signal wirings. The first insulating layer covers a first wiring layer. The first through hole opens on a surface of the first insulating layer and exposes a surface of the first wiring layer. The via fills the first through hole. The plane layer is connected to the via and is stacked on the first insulating layer. The second through hole opens on a surface of the plane layer and exposes the surface of the first insulating layer. The second insulating layer at least partially fills the second through hole and covers the plane layer. The signal wirings are stacked on the second insulating layer. The first through hole overlaps the signal wirings in a plan view. The second through hole does not overlap the signal wirings in a plan view.Type: GrantFiled: August 14, 2014Date of Patent: May 3, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yuji Kunimoto, Noriyoshi Shimizu
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Publication number: 20150364405Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.Type: ApplicationFiled: June 9, 2015Publication date: December 17, 2015Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
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Patent number: 9198290Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.Type: GrantFiled: October 29, 2014Date of Patent: November 24, 2015Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yuji Kunimoto, Naoyuki Koizumi
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Publication number: 20150053460Abstract: A wiring board includes first and second insulating layers, first and second through holes, a via, a plane layer, and signal wirings. The first insulating layer covers a first wiring layer. The first through hole opens on a surface of the first insulating layer and exposes a surface of the first wiring layer. The via fills the first through hole. The plane layer is connected to the via and is stacked on the first insulating layer. The second through hole opens on a surface of the plane layer and exposes the surface of the first insulating layer. The second insulating layer at least partially fills the second through hole and covers the plane layer. The signal wirings are stacked on the second insulating layer. The first through hole overlaps the signal wirings in a plan view. The second through hole does not overlap the signal wirings in a plan view.Type: ApplicationFiled: August 14, 2014Publication date: February 26, 2015Inventors: Yuji Kunimoto, Noriyoshi Shimizu
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Publication number: 20150048505Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.Type: ApplicationFiled: October 29, 2014Publication date: February 19, 2015Inventors: Yuji KUNIMOTO, Naoyuki KOIZUMI
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Patent number: 8941230Abstract: A metal plate covers an opening on the upper surface of a core substrate and exposes an outer edge of the upper surface of the core substrate. A conductive layer covers the lower surface of the core substrate. A semiconductor chip bonded to a first surface of the metal plate is exposed through the opening. A first insulating layer covers the upper and side surface of the metal plate and the outer edge of the upper surface of the core substrate. A second insulating layer fills the openings of the metal plate and the conductive layer and covers the outer edge of the lower surface of the core substrate, the conductive layer, and the semiconductor chip. The metal plate is thinner than the semiconductor chip. Total thickness of the conductive layer and the core substrate is equal to or larger than the thickness of the semiconductor chip.Type: GrantFiled: August 26, 2013Date of Patent: January 27, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Masahiro Kyozuka, Akihiko Tateiwa, Yuji Kunimoto, Jun Furuichi
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Patent number: 8907489Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.Type: GrantFiled: September 5, 2012Date of Patent: December 9, 2014Assignee: Shinko Electric Industries Co., Ltd.Inventors: Yuji Kunimoto, Naoyuki Koizumi