Patents by Inventor Yuji Kuwana

Yuji Kuwana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11737727
    Abstract: An ultrasonic diagnostic apparatus according to an embodiment includes a body, a plurality of wheels, and control circuitry. The body sends and receives ultrasonic waves to generate an ultrasonic image. The plurality of wheels supports and moves the body. The assist wheel is electrically driven, and assists movement of the body. The control circuitry is configured to control switching between grounded and ungrounded of the assist wheel to a floor.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: August 29, 2023
    Assignee: CANON MEDICAL SYSTEMS CORPORATION
    Inventors: Hideo Onodera, Shingo Toyoda, Shinichiro Kikuchi, Shuta Fujiwara, Yuji Kuwana
  • Patent number: 11399799
    Abstract: According to one embodiment, an ultrasound diagnostic apparatus includes a plurality of probe ports and processing circuitry. An ultrasound probe including transmission circuitry to drive transducers that generate ultrasound is connectible to each of the plurality of probe ports. The processing circuitry generates a control signal for the transmission circuitry or a drive signal to drive the transmission circuitry, according to a position of one of the probe ports to which the ultrasound probe is connected.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: August 2, 2022
    Assignee: Canon Medical Systems Corporation
    Inventors: Nobuyuki Iwama, Shuta Fujiwara, Isao Uchiumi, Hiroyuki Shibanuma, Wataru Kameishi, Yuji Kuwana
  • Publication number: 20220054107
    Abstract: In one embodiment, an ultrasonic diagnostic apparatus includes: a main body configured to generate an ultrasonic image; a body housing configured to house the main body; a display/operation panel configured to operate the main body and display the ultrasonic image; and a lifter on which the display/operation panel is placed, the lifter being attached to the body housing and configured to adjust height of the display/operation panel from a floor in each of an electric mode and a manual mode.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 24, 2022
    Applicant: CANON MEDICAL SYSTEMS CORPORATION
    Inventors: Hideo ONODERA, Shingo TOYODA, Shinichiro KIKUCHI, Shuta FUJIWARA, Yuji KUWANA
  • Publication number: 20210100529
    Abstract: An ultrasonic diagnostic apparatus according to an embodiment includes a body, a plurality of wheels, and control circuitry. The body sends and receives ultrasonic waves to generate an ultrasonic image. The plurality of wheels supports and moves the body. The assist wheel is electrically driven, and assists movement of the body. The control circuitry is configured to control switching between grounded and ungrounded of the assist wheel to a floor.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 8, 2021
    Applicant: CANON MEDICAL SYSTEMS CORPORATION
    Inventors: Hideo ONODERA, Shingo TOYODA, Shinichiro KIKUCHI, Shuta FUJIWARA, Yuji KUWANA
  • Publication number: 20200321869
    Abstract: In one embodiment, a DC/DC converter includes: a first switching element, a diode connected to the first switching element, an inductor connected to at least one of the first switching element and the diode, and a circuit connected in parallel to the first switching element, the circuit including a second switching element. A current flowing through the circuit when the second switching element is on is smaller than the current flowing through the first switching element when the first switching element is on, and the second switching element is turned on a lead time before the timing at which the first switching element is turned on.
    Type: Application
    Filed: February 27, 2020
    Publication date: October 8, 2020
    Applicant: CANON MEDICAL SYSTEMS CORPORATION
    Inventors: Yuji KUWANA, Shuta Fujiwara
  • Publication number: 20190321003
    Abstract: According to one embodiment, an ultrasound diagnostic apparatus includes a plurality of probe ports and processing circuitry. An ultrasound probe including transmission circuitry to drive transducers that generate ultrasound is connectible to each of the plurality of probe ports. The processing circuitry generates a control signal for the transmission circuitry or a drive signal to drive the transmission circuitry, according to a position of one of the probe ports to which the ultrasound probe is connected.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 24, 2019
    Applicant: Canon Medical Systems Corporation
    Inventors: Nobuyuki IWAMA, Shuta FUJIWARA, Isao UCHIUMI, Hiroyuki SHIBANUMA, Wataru KAMEISHI, Yuji KUWANA
  • Patent number: 9891575
    Abstract: An image forming device includes an attachment part to which a toner unit having a fuse that can be molten by being supplied with an electric current is detachably attached, and a control part that applies each of a non-melting conduction signal corresponding to a first current supply state where the fuse is not molten and a melting conduction signal corresponding to a second current supply state where the fuse is molten to the fuse. The control part detects each of whether or not the fuse is molten by applying the non-melting conduction signal and whether or not the fuse is molten by applying the melting conduction signal. The control part determines whether or not the toner unit attached to the attachment part is a specific exchange unit on the basis of a detection result of whether or not the fuse is molten.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: February 13, 2018
    Assignee: SOC Corporation
    Inventors: Toshitaka Ogawa, Hiroo Arikawa, Yuji Kuwana
  • Publication number: 20170261911
    Abstract: An image forming device includes an attachment part to which a toner unit having a fuse that can be molten by being supplied with an electric current is detachably attached, and a control part that applies each of a non-melting conduction signal corresponding to a first current supply state where the fuse is not molten and a melting conduction signal corresponding to a second current supply state where the fuse is molten to the fuse. The control part detects each of whether or not the fuse is molten by applying the non-melting conduction signal and whether or not the fuse is molten by applying the melting conduction signal. The control part determines whether or not the toner unit attached to the attachment part is a specific exchange unit on the basis of a detection result of whether or not the fuse is molten.
    Type: Application
    Filed: April 10, 2017
    Publication date: September 14, 2017
    Applicant: SOC Corporation
    Inventors: Toshitaka OGAWA, Hiroo ARIKAWA, Yuji KUWANA
  • Patent number: 8531187
    Abstract: Provided is a correction circuit for generating an output signal emphasizing a predetermined signal component of a supplied input signal, including: a first detection section that detects a waveform of the input signal; an amplifying section that amplifies the waveform detected by the first detection section; a correction signal generating section that generates a correction signal by extracting an alternate current component from the waveform amplified by the amplifying section; and an output signal generating section that superimposes the correction signal on the waveform of the input signal, thereby generating the output signal.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: September 10, 2013
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Naoki Matsumoto
  • Patent number: 8410817
    Abstract: A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 2, 2013
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Naoki Matsumoto, Yasuhiro Urabe
  • Patent number: 8368366
    Abstract: Provided is a driver circuit that outputs, from an output end, an output signal corresponding to an input signal supplied thereto, comprising an output resistance section that is provided between a constant voltage source and the output end; an output switching section that switches voltage of the output end according to the input signal; and a switching section that switches a resistance value of the output resistance section. The output resistance section includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switching section supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: February 5, 2013
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Naoki Matsumoto, Yasuhiro Urabe
  • Patent number: 8013626
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern and supplies the output signal to the device under test; and a measuring section that judges acceptability of the device under test by measuring a response signal output by the device under test. The driver circuit includes an input terminal that receives the input pattern; a switching section that operates according to a logic value of the input pattern to generate the output signal; and an emphasized component generating section that is provided between the input terminal and the switching section, and that (i) generates an emphasized component according to a prescribed high frequency component of the input pattern and (ii) superimposes the emphasized component onto a voltage supplied to the switching section.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 6, 2011
    Assignee: Advantest Corporation
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Publication number: 20110050194
    Abstract: Provided is a driver circuit that outputs, from an output end, an output signal corresponding to an input signal supplied thereto, comprising an output resistance section that is provided between a constant voltage source and the output end; an output switching section that switches voltage of the output end according to the input signal; and a switching section that switches a resistance value of the output resistance section. The output resistance section includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switching section supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 3, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yuji KUWANA, Naoki MATSUMOTO, Yasuhiro URABE
  • Publication number: 20110043250
    Abstract: A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.
    Type: Application
    Filed: August 17, 2010
    Publication date: February 24, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yuji KUWANA, Naoki MATSUMOTO, Yasuhiro URABE
  • Publication number: 20100244880
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the
    Type: Application
    Filed: March 27, 2009
    Publication date: September 30, 2010
    Applicant: ADVANTEST CORPORATION
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Publication number: 20100244884
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern and supplies the output signal to the device under test; and a measuring section that judges acceptability of the device under test by measuring a response signal output by the device under test. The driver circuit includes an input terminal that receives the input pattern; a switching section that operates according to a logic value of the input pattern to generate the output signal; and an emphasized component generating section that is provided between the input terminal and the switching section, and that (i) generates an emphasized component according to a prescribed high frequency component of the input pattern and (ii) superimposes the emphasized component onto a voltage supplied to the switching section.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicant: ADVANTEST CORPORATION
    Inventors: YASUHIRO URABE, NAOKI MATSUMOTO, YUJI KUWANA
  • Patent number: 7795897
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: September 14, 2010
    Assignee: Advantest Corporation
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Publication number: 20100190448
    Abstract: Provided is a correction circuit for generating an output signal emphasizing a predetermined signal component of a supplied input signal, including: a first detection section that detects a waveform of the input signal; an amplifying section that amplifies the waveform detected by the first detection section; a correction signal generating section that generates a correction signal by extracting an alternate current component from the waveform amplified by the amplifying section; and an output signal generating section that superimposes the correction signal on the waveform of the input signal, thereby generating the output signal.
    Type: Application
    Filed: January 5, 2010
    Publication date: July 29, 2010
    Applicant: ADVANTEST CORPORATION
    Inventors: Yuji KUWANA, Naoki MATSUMOTO
  • Patent number: 7342407
    Abstract: A temperature compensation circuit for effectively compensating the difference of a switching timing due to temperature change of a switching element included in a logic circuit is provided. The temperature compensation circuit includes a temperature detecting section for detecting a value corresponding to the temperature of the switching element, and a correction section for correcting the voltage of a logic signal inputted from a previous circuit to the logic circuit in order to reduce the difference of the switching timing due to the temperature change of the switching element based on the value corresponding to the temperature.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: March 11, 2008
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Yoshiharu Umemura, Takashi Sekino
  • Publication number: 20070176617
    Abstract: A temperature compensation circuit for effectively compensating the difference of a switching timing due to temperature change of a switching element included in a logic circuit is provided. The temperature compensation circuit includes a temperature detecting section for detecting a value corresponding to the temperature of the switching element, and a correction section for correcting the voltage of a logic signal inputted from a previous circuit to the logic circuit in order to reduce the difference of the switching timing due to the temperature change of the switching element based on the value corresponding to the temperature.
    Type: Application
    Filed: January 31, 2006
    Publication date: August 2, 2007
    Applicant: Advantest Corporation
    Inventors: Yuji Kuwana, Yoshiharu Umemura, Takashi Sekino