Patents by Inventor Yuji Matsune

Yuji Matsune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 6352879
    Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: March 5, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuki Fukui, Yoshiki Sota, Yuji Matsune, Atsuya Narai
  • Semiconductor device and method of manufacturing the same
    Patent number: 6229217
    Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: May 8, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuki Fukui, Yoshiki Sota, Yuji Matsune, Atsuya Narai
  • Semiconductor device and method of manufacturing the same
    Patent number: 6100594
    Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: August 8, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuki Fukui, Yoshiki Sota, Yuji Matsune, Atsuya Narai
  • Semiconductor device and method of manufacturing the same
    Patent number: RE38806
    Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: October 4, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuki Fukui, Yoshiki Sota, Yuji Matsune, Atsuya Narai