Patents by Inventor Yuji Muraoka
Yuji Muraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11975543Abstract: A liquid replenishing system includes a liquid tank and a liquid storage bottle for storing liquid to be replenished to the liquid tank. The liquid tank includes a tank body, a cylindrical adapter, and a needle penetrating into the tank body inside the cylindrical adapter. One end of the needle is located outside the tank body and another end of the needle is located inside the tank body. The liquid storage bottle includes a bottle body, a nozzle having an ejection port for ejecting a liquid stored in the bottle body, and includes a slit valve provided at the ejection port. In a case where the nozzle of the liquid storage bottle and the cylindrical adapter of the liquid tank are fitted to each other, one end of the needle is inserted into the slit valve so that the liquid storage bottle is secured to the liquid tank.Type: GrantFiled: March 8, 2022Date of Patent: May 7, 2024Assignee: Canon Kabushiki KaishaInventors: Takanori Yashiro, Chiaki Muraoka, Tatsuo Nanjo, Hirofumi Okuhara, Kazumasa Matsushita, Yuji Tamaru
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Patent number: 8270103Abstract: An imaging lens unit configured for processing by a solder reflow process, and includes a lens group of one or more lenses; and a lens tube supporting the lens group. The imaging lens unit comprises one or more cationically-cured epoxy resin lenses formed from an cationically-curable epoxy resin material, the lens tube is formed from a thermoplastic resin material having a deflection temperature under load of at least 200° C. The imaging lens unit has a clearance between the lens tube and at least one of the cationically-cured epoxy resin lenses and has lens supporting portions provided at least three locations inside the lens tube that support the at least one cationically-cured epoxy resin lens. The lens unit can be miniaturized. The imaging lens unit also provides excellent optical characteristics without deteriorating the optical characteristics in alignment of the centers of the lens and the diaphragm.Type: GrantFiled: April 16, 2009Date of Patent: September 18, 2012Assignees: Komatsulite Mfg. Co., Ltd., Nippon Shokubai Co., LtdInventors: Yoshihiro Miyawaki, Yuji Muraoka, Nobuyuki Ando, Junichi Nakamura, Yasunori Tsujino, Masafumi Yamashita, Yukihiro Kasano
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Publication number: 20110038065Abstract: The present invention provides an imaging lens unit configured to be processed by the solder reflow process, can be miniaturized, and has sufficient thermal resistance for the reflow temperatures. The imaging lens unit also provides excellent optical characteristics such as transmissivity, a refractive index, and the like without deteriorating the optical characteristics in alignment of the centers of the lens and the diaphragm even after the reflow process, so as to contribute to reduction in the size and an increase in the capabilities. The imaging lens unit is configured to be processed by a solder reflow process, and includes a lens group consisting of one or more lenses; and a lens tube that supports the lens group, wherein the imaging lens unit comprises one or more cationically-cured epoxy resin lenses formed from an cationically-curable epoxy resin material, the lens tube is formed from a thermoplastic resin material having a deflection temperature under load of not lower than 200° C.Type: ApplicationFiled: April 16, 2009Publication date: February 17, 2011Applicants: KOMATSULITE MFG. CO., LTD., NIPPON SHOKUBAI CO., LTD.Inventors: Yoshihiro Miyawaki, Yuji Muraoka, Nobuyuki Ando, Junichi Nakamura, Yasunori Tsujino, Masafumi Yamashita, Yukihiro Kasano
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Patent number: 6488908Abstract: A substrate and a target are disposed within a vacuum chamber, and an oxygen partial pressure within the vacuum chamber is set to 1×10−5 or less. Under this condition, a spinel ferrite thin film selected from the group consisting of compounds represented by the formula AE1+tFe2−2tTMtO4, where AE represents an alkaline earth metal or an alkali metal, TM represents a transition metal and t falls within a range of between 0.2 and 0.6, and compounds represented by the formula Zn1−xCoxFe2O4, where x falls within a range of between 0.2 and 0.7, is deposited on the substrate by laser beam deposition. The particular method makes it possible to provide a spinel ferrite thin film realizing a spin glass state under temperatures around or higher than room temperature and capable of controlling the spin state by light.Type: GrantFiled: August 31, 2000Date of Patent: December 3, 2002Assignee: President of Osaka UniversityInventors: Tomoji Kawai, Hitoshi Tabata, Yuji Muraoka
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Patent number: 6181609Abstract: A semiconductor memory device having a latch signal generating circuit which can latch the read data at a data-read timing corresponding to either of the minimum tCAS and the minimum tCP, that is, in either of the low-potential state and the high-potential state of CASB. The semiconductor memory device has different data-read operation cycles, and comprises a decoder into which an address signal is input; a memory cell array consisting of memory cells; a D-latch circuit for latching data output from one of the memory cells which is selected by the decoder; an output buffer for outputting the data which is output from the D-latch circuit; and a latch signal generating circuit for generating a clock signal used in the D-latch circuit, the generated signal having a data-latch timing which is effective in each data-read operation cycle.Type: GrantFiled: September 15, 1999Date of Patent: January 30, 2001Assignee: NEC CorporationInventor: Yuji Muraoka
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Patent number: 5862084Abstract: An output circuit for a semiconductor memory device includes at least an output transistor and a level conversion circuit. In this case, the level conversion circuit is connected to the output transistor. The output transistor is connected to a ground terminal and an output terminal. In this condition, the level conversion circuit converts an input signal in level and supplies the converted input signal to the output transistor as drive signal. With such a structure, a predetermined booster voltage is given to the level conversion circuit. Consequently, the ground potential appears at the output terminal without an access delay when the output transistor is turned on by the drive signal.Type: GrantFiled: December 22, 1997Date of Patent: January 19, 1999Assignee: NEC CorporationInventor: Yuji Muraoka