Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.

Abstract: The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing data to the memory cell array. The writing controller is capable of individually setting memory information of each of the memory cells in the memory cell array.