Patents by Inventor Yujiro Sakurada

Yujiro Sakurada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230326955
    Abstract: A semiconductor device with a small variation in characteristics is provided. In a manufacturing method of a semiconductor device including a capacitor with reduced leak current, a first conductor is formed; a second insulator is formed over the first conductor; a third insulator is formed over the second insulator; a second conductor is formed over the third insulator; a fourth insulator is deposited over the second conductor and the third insulator; by heat treatment, hydrogen contained in the third insulator diffuses into or is absorbed by the second insulator; the first conductor is one electrode of the capacitor; the second conductor is the other electrode of the capacitor; and each of the second insulator and the third insulator is a dielectric of the capacitor.
    Type: Application
    Filed: August 12, 2021
    Publication date: October 12, 2023
    Inventors: Shunpei YAMAZAKI, Sachiaki TEZUKA, Haruyuki BABA, Yuji EGI, Yasuhiro JINBO, Yujiro SAKURADA, Takeshi AOKI
  • Publication number: 20230326751
    Abstract: A metal oxide with excellent thickness uniformity is provided. A method for manufacturing a metal oxide with reduced hydrogen concentration in SIMS analysis includes a first step of introducing a precursor and a carrier/purge gas; a second step of stopping the introduction of the precursor and exhausting the precursor; a third step of introducing an oxidizing gas; and a fourth step of stopping the introduction of the oxidizing gas and exhausting the oxidizing gas. The first step to the fourth step are performed in a temperature range higher than or equal to 210° C. and lower than or equal to 300° C.
    Type: Application
    Filed: August 6, 2021
    Publication date: October 12, 2023
    Inventors: Shunpei YAMAZAKI, Yuji EGI, Yasuhiro JINBO, Yujiro SAKURADA
  • Publication number: 20230274935
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A metal oxide is formed over a substrate by the steps of: introducing a first precursor into a chamber in which the substrate is provided; introducing a first oxidizer after the introduction of the first precursor; introducing a second precursor after the introduction of the first oxidizer; and introducing a second oxidizer after the introduction of the second precursor.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 31, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tetsuya KAKEHATA, Yuji EGI, Yasuhiro JINBO, Yujiro SAKURADA
  • Publication number: 20230113593
    Abstract: A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.
    Type: Application
    Filed: March 19, 2021
    Publication date: April 13, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshihiro KOMATSU, Shota MIZUKAMI, Shinobu KAWAGUCHI, Hiromi SAWAI, Yasumasa YAMANE, Yuji EGI, Yujiro SAKURADA, Shinya SASAGAWA
  • Patent number: 11600489
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A metal oxide is formed over a substrate by the steps of: introducing a first precursor into a chamber in which the substrate is provided; introducing a first oxidizer after the introduction of the first precursor; introducing a second precursor after the introduction of the first oxidizer; and introducing a second oxidizer after the introduction of the second precursor.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: March 7, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuya Kakehata, Yuji Egi, Yasuhiro Jinbo, Yujiro Sakurada
  • Publication number: 20210233769
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A metal oxide is formed over a substrate by the steps of: introducing a first precursor into a chamber in which the substrate is provided; introducing a first oxidizer after the introduction of the first precursor; introducing a second precursor after the introduction of the first oxidizer; and introducing a second oxidizer after the introduction of the second precursor.
    Type: Application
    Filed: May 31, 2019
    Publication date: July 29, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tetsuya KAKEHATA, Yuji EGI, Yasuhiro JINBO, Yujiro SAKURADA
  • Publication number: 20150287831
    Abstract: A semiconductor device includes an oxide semiconductor film, a source electrode, a drain electrode, a gate insulating film, a gate electrode, and an insulating film. The source electrode includes a region in contact with the oxide semiconductor film. The drain electrode includes a region in contact with the oxide semiconductor film. The gate insulating film is provided between the oxide semiconductor film and the gate electrode. The insulating film is provided over the gate electrode and over the gate insulating film. The insulating film includes a first portion and a second portion. The first portion includes a step portion. The second portion includes a non-step portion. The first portion includes a portion with a first thickness. The second portion includes a portion with a second thickness. The second thickness is larger than or equal to 1.0 time and smaller than or equal to 2.0 times the first thickness.
    Type: Application
    Filed: April 2, 2015
    Publication date: October 8, 2015
    Inventors: Tetsuhiro TANAKA, Yujiro SAKURADA, Yutaka OKAZAKI
  • Patent number: 8368082
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Yujiro Sakurada
  • Publication number: 20130023108
    Abstract: An insulating layer is formed on a surface of a semiconductor wafer which is to be a bond substrate and an embrittlement region is formed in the semiconductor wafer by irradiation with accelerated ions. Then, a base substrate and the semiconductor wafer are attached to each other. After that, the semiconductor wafer is divided at the embrittlement region by performing heat treatment and an SOI substrate including a semiconductor layer over the base substrate with the insulating layer interposed therebetween is formed. Before the SOI substrate is formed, heat treatment is performed on the semiconductor wafer at a temperature of higher than or equal to 1100° C. under a non-oxidizing atmosphere in which the concentration of impurities is reduced. In this manner, the planarity of the film formed on the semiconductor wafer when heat treatment is performed can be improved.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuya HANAOKA, Yujiro SAKURADA, Hideki TSUYA, Makoto FURUNO, Miku FUJITA
  • Publication number: 20120037903
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Application
    Filed: October 27, 2011
    Publication date: February 16, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomokazu YOKOI, Yujiro SAKURADA
  • Patent number: 8048771
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Yujiro Sakurada
  • Publication number: 20090134397
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 28, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomokazu YOKOI, Yujiro Sakurada