Abstract: A condensed heterocyclic compound has a sepiapterin reductase inhibitory action and is particularly useful for treatment of a pain. The condensed heterocyclic compound represented by Formula (I) below (R1 represents a hydrocarbon group or the like; R2 and R3 represent a hydrogen atom or the like; R4, X, and Y represent defined substituents), a tautomer or a pharmaceutically acceptable salt of the compound, or a solvate of any of these.

Abstract: A power module comprises an element and an insulated circuit board having a laminated portion. The laminated portion includes a first metal layer, a bonding layer interposed between an element and the first metal layer, a second metal layer, and a resin layer interposed between the first metal layer and the second metal layer. The insulated circuit board has a pair of laminated portions provided so as to sandwich the element. The laminated portions are configured so that ultrasonic pulses emitted from an outside of the second metal layer toward the element have the following relationship of detection time periods. A time period in which the ultrasonic pulse travels two roundtrips in the second metal layer is longer than a time period in which the ultrasonic pulse travels one roundtrip in a range from the second metal layer to the element.

Abstract: A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

Abstract: A semiconductor device includes a semiconductor chip having first and second main electrodes disposed on opposite surfaces of a silicon carbide substrate, first and second heat dissipation members disposed so as to sandwich the semiconductor chip, and joining members disposed between the first main electrode and the first heat dissipation member and between the second main electrode and the second heat dissipation member. At least one of the joining members is made of a lead-free solder having an alloy composition that contains 3.2 to 3.8 mass % Ag, 0.6 to 0.8 mass % Cu, 0.01 to 0.2 mass % Ni, x mass % Sb, y mass % Bi, 0.001 to 0.3 mass % Co, 0.001 to 0.2 mass % P, and a balance of Sn, where x and y satisfy relational expressions of x+2y?11 mass %, x+14y?42 mass %, and x?5.1 mass %.

Abstract: A semiconductor device includes circuit substrates 3 and 9 including circuit pattern layers 3c/9b, a semiconductor element 5 mounted to the circuit pattern layer 3c, a connecting pin 7 connecting the semiconductor element 5 to the circuit pattern layer 9b, a pin-shaped terminal 17 connected to the circuit pattern layer 9b, a sealing member 2 sealing the circuit substrates 3 and 9, the semiconductor element 5, and the connecting pin 7, and an external terminal 27 including a flat plate portion 27s and an extending portion 27t bent from the flat plate portion 27s and extends away from the circuit substrate 9, in which the flat plate portion 27s is connected to the pin-shaped terminal 17 and arranged in parallel with the circuit pattern layer 9b, and the extending portion 27t is provided in a range of a width in a transverse direction of the sealing member 2.

Abstract: A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

Abstract: A semiconductor device includes circuit substrates 3 and 9 including circuit pattern layers 3c/9b, a semiconductor element 5 mounted to the circuit pattern layer 3c, a connecting pin 7 connecting the semiconductor element 5 to the circuit pattern layer 9b, a pin-shaped terminal 17 connected to the circuit pattern layer 9b, a sealing member 2 sealing the circuit substrates 3 and 9, the semiconductor element 5, and the connecting pin 7, and an external terminal 27 including a flat plate portion 27s and an extending portion 27t bent from the flat plate portion 27s and extends away from the circuit substrate 9, in which the flat plate portion 27s is connected to the pin-shaped terminal 17 and arranged in parallel with the circuit pattern layer 9b, and the extending portion 27t is provided in a range of a width in a transverse direction of the sealing member 2.

Abstract: A semiconductor device includes a base plate, a plurality of semiconductor units provided in parallel on the base plate, the plurality of semiconductor units implementing a pair, each semiconductor unit including a semiconductor chip and a rod-shaped unit-side control terminal, the unit-side control terminal being connected to the semiconductor chip, the unit-side control terminal extending opposite to the base plate; and an interface unit including a box-shaped accommodating portion, the accommodating portion being provided on the plurality of semiconductor units, the accommodating portion including an internal wiring and a rod-shaped external-connecting control terminal, the internal wiring being connected to each of the plurality of the unit-side control terminals extending from the plurality of semiconductor units, the external-connecting control terminal extending to the outside opposite to the semiconductor units, the external-connecting control terminal being connected to the internal wiring.

Abstract: A semiconductor device includes a conductive plate having a front surface on which a semiconductor element is mounted and a sealing resin sealing therein at least the front surface of the conductive plate. The conductive plate includes a structure that traps bubbles in a region where flows of the injected sealing resin merge. The conductive plate has a rectangular shape. The sealing resin is injected from a single inlet on a first longitudinal side of the conductive plate. The region where the flows of the sealing resin merge is a region of a corner of a second longitudinal side that across the semiconductor element, opposes the first longitudinal side from which the sealing resin is injected.

Abstract: The semiconductor device includes a multi-layered substrate having an insulating plate and a circuit plate, a semiconductor chip having a front surface attached with a main electrode and a control electrode formed thereon, and a back surface fixed to the circuit plate, a first wiring substrate which includes a first conductive member and is placed so as to face the main electrode connected electrically to first conductive member, a second wiring substrate which includes a second conductive member, is placed so as to face the control electrode, and has an opening, and a conductive post having one end and another end, the one end being connected electrically and mechanically to the control electrode, and the other end being connected electrically and mechanically to the second conductive member. The first conductive member is thicker than the second conductive member, and the first wiring substrate is disposed within the opening.

Abstract: A semiconductor device includes a conductive plate having a front surface on which a semiconductor element is mounted and a sealing resin sealing therein at least the front surface of the conductive plate. The conductive plate includes a structure that traps bubbles in a region where flows of the injected sealing resin merge. The conductive plate has a rectangular shape. The sealing resin is injected from a single inlet on a first longitudinal side of the conductive plate. The region where the flows of the sealing resin merge is a region of a corner of a second longitudinal side that across the semiconductor element, opposes the first longitudinal side from which the sealing resin is injected.

Abstract: A semiconductor device includes a base plate, a plurality of semiconductor units provided in parallel on the base plate, the plurality of semiconductor units implementing a pair, each semiconductor unit including a semiconductor chip and a rod-shaped unit-side control terminal, the unit-side control terminal being connected to the semiconductor chip, the unit-side control terminal extending opposite to the base plate; and an interface unit including a box-shaped accommodating portion, the accommodating portion being provided on the plurality of semiconductor units, the accommodating portion including an internal wiring and a rod-shaped external-connecting control terminal, the internal wiring being connected to each of the plurality of the unit-side control terminals extending from the plurality of semiconductor units, the external-connecting control terminal extending to the outside opposite to the semiconductor units, the external-connecting control terminal being connected to the internal wiring.

Abstract: In a power semiconductor module, the 0.2% yield strength of solder under a lead terminal that bonds the lead terminal and a semiconductor element is set to be lower than the 0.2% yield strength of solder under the semiconductor element that bonds the semiconductor element and an insulating substrate. As a result, the lead terminal is expanded with self-heating by energization of the semiconductor element, and stress is applied to the semiconductor element via the solder under the lead terminal. However, the solder under the lead terminal with low 0.2% yield strength reduces the stress that is applied to the semiconductor element. Thus, the reliability of a surface electrode of the semiconductor element that is bonded to the solder under the lead terminal is improved.

Abstract: In a power semiconductor module, the 0.2% yield strength of solder under a lead terminal that bonds the lead terminal and a semiconductor element is set to be lower than the 0.2% yield strength of solder under the semiconductor element that bonds the semiconductor element and an insulating substrate. As a result, the lead terminal is expanded with self-heating by energization of the semiconductor element, and stress is applied to the semiconductor element via the solder under the lead terminal. However, the solder under the lead terminal with low 0.2% yield strength reduces the stress that is applied to the semiconductor element. Thus, the reliability of a surface electrode of the semiconductor element that is bonded to the solder under the lead terminal is improved.

Abstract: Provided is a molded product manufacturing method, including attachment of attaching a partially exposed member that extends from inside a sealed portion in the molded product to be exposed to outside to a sealing target member that is to be sealed inside the sealed portion in the molded product; injecting of inserting the sealing target member having the partially exposed member attached thereto in a die and injecting a sealing material into the die; adjustment of, in a first time period during which the sealing material is injected, holding the partially exposed member at a position differing from a final position in the molded product and adjusting a flow of the sealing material with an adjusting member attached to the partially exposed member; and hardening the sealing material after the first time period.

Abstract: The semiconductor device includes a multi-layered substrate having an insulating plate and a circuit plate, a semiconductor chip having a front surface attached with a main electrode and a control electrode formed thereon, and a back surface fixed to the circuit plate, a first wiring substrate which includes a first conductive member and is placed so as to face the main electrode connected electrically to first conductive member, a second wiring substrate which includes a second conductive member, is placed so as to face the control electrode, and has an opening, and a conductive post having one end and another end, the one end being connected electrically and mechanically to the control electrode, and the other end being connected electrically and mechanically to the second conductive member. The first conductive member is thicker than the second conductive member, and the first wiring substrate is disposed within the opening.

Abstract: A perpendicular magnetic recording medium is disclosed. The perpendicular magnetic recording medium includes a first layer, and a second layer positioned immediately below the first layer. Among the materials in the first layer and the second layer, if the interface energy when two different materials—material a and material b—are in contact is defined as Ei(a//b), the surface energy when material a exists independently is defined as Es(a), and the energy resulting by subtracting the sum of the respective surface energies (?Es) from the interface energy is defined as G(a//b), then when G(1//3)<G(1//4) holds, either G(2//4) or G(1//3) is the minimum among G(1//3), G(1//4), G(2//3) and G(2//4), and when G(1//3)<G(1//4) does not hold, G(2//4) is the minimum among G(1//3), G(1//4), G(2//3) and G(2//4).

Abstract: Provided are a perpendicular magnetic recording medium and a method for manufacturing the same, the perpendicular magnetic recording medium including an alloy (FePt, FePd, or CoPt) having a large Ku value with an L10 type ordered structure, and obtained with achievement of controlled crystal orientation and thin film formation without heating. Specifically, in the perpendicular magnetic recording medium, at least a nonmagnetic seed layer, a nonmagnetic underlayer, and a magnetic layer are formed in this order on a nonmagnetic substrate. The nonmagnetic seed layer includes a MgO layer and a metal layer having a body-centered cubic (bcc) structure. The nonmagnetic underlayer has a NaCl type structure of one selected from the group consisting of MgO, NiO, TiO, CrN, Ti carbides, and Ti nitrides. The magnetic layer includes an alloy selected from the group consisting of FePt, FePd, and CoPt having an L10 type ordered structure.

Abstract: The present invention provides: a thin film structure including an ordered alloy in which atoms are orderly arranged using an inexpensive substrate; and a method for manufacturing the thin film structure. Specifically, the thin film structure includes a substrate, a plating layer formed on the substrate and made of one selected from the group consisting of NiPMo and NiPW, and an ordered alloy disposed on the plating layer. The method for manufacturing the thin film structure includes the steps of: forming a plating layer on a substrate, the plating layer being made of one selected from the group consisting of NiPMo and NiPW; and forming an ordered alloy on the plating layer. The vacuum degree immediately before the ordered alloy is formed is 7.0×10?7 Pa or less. In the step of forming the ordered alloy, a process gas has an impurity concentration of 5 ppb or lower.

Abstract: Provided are a perpendicular magnetic recording medium and a method for manufacturing the same, the perpendicular magnetic recording medium including an alloy (FePt, FePd, or CoPt) having a large Ku value with an L10 type ordered structure, and obtained with achievement of controlled crystal orientation and thin film formation without heating. Specifically, in the perpendicular magnetic recording medium, at least a nonmagnetic seed layer, a nonmagnetic underlayer, and a magnetic layer are formed in this order on a nonmagnetic substrate. The nonmagnetic seed layer includes a MgO layer and a metal layer having a body-centered cubic (bcc) structure. The nonmagnetic underlayer has a NaCl type structure of one selected from the group consisting of MgO, NiO, TiO, CrN, Ti carbides, and Ti nitrides. The magnetic layer includes an alloy selected from the group consisting of FePt, FePd, and CoPt having an L10 type ordered structure.