Abstract: A semiconductor light emitting element includes an optical waveguide having a first and second waveguide provided with a width that allows propagation of light in a second-order mode or higher and a multimode optical interference waveguide provided with a wider width than the first and second waveguide and arranged at a position therebetween. The semiconductor light emitting element further includes a first optical loss layer facing the first waveguide in an active-layer crossing direction for causing a loss of light that is propagating in the first waveguide in the second-order mode or higher and a second optical loss layer facing the second waveguide in an active-layer crossing direction for causing a loss of light that is propagating in the second waveguide in the second-order mode or higher, the active-layer crossing direction being orthogonal to a surface of an active layer.

Abstract: An optical transceiver includes a plurality of light sources having a ring resonator, a reception antenna to receive light, and a wavelength-separating filter to separate, from the light received by the reception antenna, light of a same wavelength as the light output from a part of the plurality of light sources. The wavelength-separating filter is composed of the ring resonator included in the light source.

Abstract: In a semiconductor device, a quantum dot group includes a stack of plural quantum dot layers having different central wavelengths at which respective gains are maximum. A part of or all of the quantum dot layers are stacked so that the central wavelengths sequentially shifts along a stacking direction. The quantum dot group includes a longest wavelength layer group composed of some quantum dot layers including a longest wavelength layer having a longest central wavelength and at least one quantum dot layer stacked on the longest wavelength layer. The longest wavelength layer or the longest wavelength layer group has a larger gain at the central wavelength than the gain at the central wavelength of each of the other quantum dot layers.

Abstract: The semiconductor laser device includes: an activation layer having at least one first quantum dot layer and at least one second quantum dot layer having a longer emission wavelength than the first quantum dot layer. The gain spectrum of the active layer has the maximum values at the first wavelength and the second wavelength longer than the first wavelength corresponding to the emission wavelength of the first quantum dot layer and the emission wavelength of the second quantum dot layer, respectively. The maximum value of the gain spectrum at the first wavelength is defined as the first maximum value, and the maximum value of the gain spectrum at the second wavelength is defined as the second maximum value. The first maximum value is larger than the second maximum value.

Abstract: An optical semiconductor device includes an active layer having a plurality of quantum dot layers. The plurality of quantum dot layers include: a first quantum dot layer doped with a p-type impurity; and a second quantum dot layer doped with an n-type impurity and having an emission wavelength different from that of the first quantum dot layer.

Abstract: An optical semiconductor device includes an active layer having a plurality of quantum dot layers. The plurality of quantum dot layers includes at least one quantum dot player doped with a p-type impurity. Further, the plurality of quantum dot layers includes at least two quantum dot layers having different emission wavelengths and different p-type impurity concentrations.

Abstract: The semiconductor laser device includes: an activation layer having at least one first quantum dot layer and at least one second quantum dot layer having a longer emission wavelength than the first quantum dot layer. The gain spectrum of the active layer has the maximum values at the first wavelength and the second wavelength longer than the first wavelength corresponding to the emission wavelength of the first quantum dot layer and the emission wavelength of the second quantum dot layer, respectively. The maximum value of the gain spectrum at the first wavelength is defined as the first maximum value, and the maximum value of the gain spectrum at the second wavelength is defined as the second maximum value. The first maximum value is larger than the second maximum value.

Abstract: A first optical waveguide is formed on a semiconductor substrate in such a way that the first optical waveguide is surrounded by clad layers. An outside portion of the first optical waveguide is formed as a terminator, which includes a taper portion and a bending structure portion. The taper portion has a width, which is gradually reduced in a direction to a forward end of the first optical waveguide. The taper portion coverts a light confinement condition from a strong condition to a weak condition in the direction to the forward end of the first optical waveguide. The bending structure portion has an arc shape extending from an outside end of the taper portion on a plane parallel to a surface of the semiconductor substrate.

Abstract: A beam deflection system includes 2M laser light sources configured to emit laser lights, each laser light source being configured to switch two different center wavelengths to each other. The 2M laser light sources are divided into two sets of M types. The laser lights emitted from the two sets of M types of laser light sources are combined and input to a beam deflector. When (i) N is defined as an integer satisfying an expression of “1?N?M”, and (ii) center wavelengths of Nth laser light sources of the two sets of M laser light sources are defined as ?N and ?M+N, an expression of “?1< . . . <?N< . . . <?M<?M+1< . . . <?M+N< . . . <?2M” is satisfied.

Abstract: A semiconductor light emitting element includes an optical waveguide having a first and second waveguide provided with a width that allows propagation of light in a second-order mode or higher and a multimode optical interference waveguide provided with a wider width than the first and second waveguide and arranged at a position therebetween. The semiconductor light emitting element further includes a first optical loss layer facing the first waveguide in an active-layer crossing direction for causing a loss of light that is propagating in the first waveguide in the second-order mode or higher and a second optical loss layer facing the second waveguide in an active-layer crossing direction for causing a loss of light that is propagating in the second waveguide in the second-order mode or higher, the active-layer crossing direction being orthogonal to a surface of an active layer.

Abstract: A first optical waveguide is formed on a semiconductor substrate in such a way that the first optical waveguide is surrounded by clad layers. An outside portion of the first optical waveguide is formed as a terminator, which includes a taper portion and a bending structure portion. The taper portion has a width, which is gradually reduced in a direction to a forward end of the first optical waveguide. The taper portion coverts a light confinement condition from a strong condition to a weak condition in the direction to the forward end of the first optical waveguide. The bending structure portion has an arc shape extending from an outside end of the taper portion on a plane parallel to a surface of the semiconductor substrate.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A DC-DC converter has an error amplifier that amplifies a potential difference between a first voltage based on an output voltage at the output terminal and a reference voltage, and outputs a resultant error amplified signal; a differential detecting circuit that senses an inclination of a temporal change of the output voltage by differentiating the first voltage, outputs a control signal according to a result of the sensing; and a PWM generating circuit that compares a synthetic signal obtained by conducting computation on the amplified error signal and the control signal with a periodically changing comparison signal, and outputs a PWM signal having a duty ratio controlled according to a result of the comparison.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A motor control device has first to third amplifiers which amplify voltage generated at first to third shunt resistances connected to first to third drivers to supply driving current of each of three phases to a three-phase brushless motor, first to third sample-hold circuits which sample and hold voltage amplified by the first to third amplifiers, a multiplexer which sequentially selects and outputs voltage values held by the first to third sample-hold circuits, an A/D converter which performs A/D conversion on output signals of the multiplexer, and an arithmetic unit which calculates the driving current through an output signal of the A/D converter, estimates a magnetic pole position of the motor based on the driving current, and performs pulse width modulation (PWM) control on the driving current by controlling the first to third drivers.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.