Patents by Inventor Yuki Koyama

Yuki Koyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190027312
    Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrodes that are laminated, and external electrodes disposed on side surfaces of the laminate to be connected to corresponding internal electrodes. A dimension L of the multilayer ceramic capacitor in its lengthwise direction and a dimension W in its width direction satisfy: about 0.85?W/L?about 1, and L?about 750 ?m, and a dimension T in its lamination direction satisfies: about 70 ?m?T?about 110 ?m. The laminate has a dimension t in the lamination direction, and a region in which the internal electrodes are laminated has a dimension t? in the lamination direction, and a ratio of the dimensions satisfies: t?/t?about 0.55.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 24, 2019
    Inventors: Satoshi MURAMATSU, Yuki KOYAMA
  • Publication number: 20180342350
    Abstract: Film capacitor includes capacitor unit that has capacitor elements, upper bus bar, and lower bus bar. Capacitor elements have upper end electrodes and lower end electrodes that are connected to upper bus bar and lower bus bar, respectively. Film capacitor further includes case containing capacitor unit and being filled with filler resin, cooling plate near capacitor unit, and plate springs. Cooling plate is connected to a cooler and discharges heat generated from capacitor elements into the cooler. Plate springs apply an elastic force to capacitor unit in a direction toward cooling plate.
    Type: Application
    Filed: August 1, 2018
    Publication date: November 29, 2018
    Inventors: YUKI KOYAMA, AKIHIRO OZAKI
  • Patent number: 10109422
    Abstract: A film capacitor includes: a capacitor element in which a metallikon electrode is formed at an end; a bus bar connected with the metallikon electrode; a case having a container for housing the capacitor element and the bus bar; a lid member which covers an opening of the container; and a heat conducting member disposed between the bus bar and the lid member. The lid member has a protrusion on a side facing the heat conducting member, the protrusion is in contact with the heat conducting member, and the heat conducting member is in contact with the bus bar.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: October 23, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuki Koyama, Akihiro Ozaki
  • Publication number: 20170062134
    Abstract: A film capacitor includes: a capacitor element in which a metallikon electrode is formed at an end; a bus bar connected with the metallikon electrode; a case having a container for housing the capacitor element and the bus bar; a lid member which covers an opening of the container; and a heat conducting member disposed between the bus bar and the lid member. The lid member has a protrusion on a side facing the heat conducting member, the protrusion is in contact with the heat conducting member, and the heat conducting member is in contact with the bus bar.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: YUKI KOYAMA, AKIHIRO OZAKI
  • Patent number: 8125085
    Abstract: A semiconductor device includes an interlayer film formed over a semiconductor substrate. A groove is formed in the interlayer film. A wiring formed in the groove is a copper alloy including copper and a metal element. An oxide layer of the metal element is formed over the surface of the wiring. The oxide layer is formed in a first region along a grain boundary of a copper crystal and a second region surrounded by the grain boundary, over the surface of the wiring. The oxide layer formed in the first region has a thickness greater than that of the oxide layer formed in the second region.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: February 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyoshi Maekawa, Kenichi Mori, Kazuyuki Omori, Yuki Koyama
  • Publication number: 20100044864
    Abstract: The present invention aims at providing a method of manufacturing a semiconductor device capable of suppressing metal diffusion from the upper face of wiring. In the present invention, a copper seed film containing copper and a first metal element is formed in a groove formed in a first interlayer film over a semiconductor substrate. After that, a copper plating treatment is performed. After that, a first heat treatment is performed in a first atmosphere in which the copper layer is not oxidized. Then, an excess metal layer of copper alloy is removed and copper alloy wiring is formed in the groove. After that, a second heat treatment is performed in a second atmosphere containing oxygen to form an oxide layer being the oxide of the first metal element over the surface of the copper alloy wiring.
    Type: Application
    Filed: June 9, 2009
    Publication date: February 25, 2010
    Inventors: Kazuyoshi MAEKAWA, Kenichi Mori, Kazuyuki Omori, Yuki Koyama