Patents by Inventor Yukie Nishikawa

Yukie Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985897
    Abstract: A semiconductor device includes a semiconductor layer, a first electrode on a first surface of the semiconductor layer, a plurality of second electrodes on a second surface of the semiconductor layer, a control electrode between the first electrode and each of the plurality of second electrodes and electrically insulated from the semiconductor layer and each of the plurality of second electrodes, and a resin layer partially covering the second surface of the semiconductor layer and having a plurality of openings through which the respective second electrodes are at least partially exposed. Each of the plurality of openings has rounded corners. The device further includes a sensor element above the second surface of the semiconductor layer and covered by a first part of the resin layer surrounded by the openings.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 14, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Emiko Adachi, Yukie Nishikawa, Kotaro Zaima
  • Patent number: 11817476
    Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kotaro Zaima, Yukie Nishikawa, Emiko Adachi
  • Publication number: 20230091325
    Abstract: A semiconductor device includes a silicon substrate, a first layer, a second layer, a barrier metal, and a gate pad. The first layer is formed of an oxide film provided on an upper surface of the silicon substrate. The second layer is a layer at least selectively having a projecting and recessed part on an upper surface of the first layer, the projecting and recessed part having a projection and recess deeper than a projection and recess occurring when the layer is formed in a planar shape. The barrier metal is formed on an upper surface of the second layer according to a shape of the projecting and recessed part. The gate pad is in close contact with the silicon substrate via the barrier metal.
    Type: Application
    Filed: March 11, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Emiko INOUE, Yukie NISHIKAWA
  • Publication number: 20220077230
    Abstract: A semiconductor device includes a semiconductor layer, a first electrode on a first surface of the semiconductor layer, a plurality of second electrodes on a second surface of the semiconductor layer, a control electrode between the first electrode and each of the plurality of second electrodes and electrically insulated from the semiconductor layer and each of the plurality of second electrodes, and a resin layer partially covering the second surface of the semiconductor layer and having a plurality of openings through which the respective second electrodes are at least partially exposed. Each of the plurality of openings has rounded corners. The device further includes a sensor element above the second surface of the semiconductor layer and covered by a first part of the resin layer surrounded by the openings.
    Type: Application
    Filed: March 1, 2021
    Publication date: March 10, 2022
    Inventors: Emiko ADACHI, Yukie NISHIKAWA, Kotaro ZAIMA
  • Publication number: 20220059649
    Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.
    Type: Application
    Filed: February 24, 2021
    Publication date: February 24, 2022
    Inventors: Kotaro ZAIMA, Yukie NISHIKAWA, Emiko ADACHI
  • Patent number: 11056557
    Abstract: A semiconductor device includes a semiconductor layer on a first electrode. The semiconductor layer includes a first region of a first type, a second region of a second type, a third region of the second type, and a fourth region of the first type. The second region is above the first region. The third region surrounds the second region. The fourth region surrounds the third region. The second electrode includes a first portion above the second region and a second portion surrounding the first portion. The third electrode surrounds the second electrode and is electrically connected to the fourth region. The semi-insulating layer is electrically connected to the second electrode and the third electrode. A first end portion of the first insulating layer is above the third region.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: July 6, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kazuki Minamikawa, Yukie Nishikawa, Kotaro Zaima
  • Publication number: 20200295128
    Abstract: A semiconductor device includes a semiconductor layer on a first electrode. The semiconductor layer includes a first region of a first type, a second region of a second type, a third region of the second type, and a fourth region of the first type. The second region is above the first region. The third region surrounds the second region. The fourth region surrounds the third region. The second electrode includes a first portion above the second region and a second portion surrounding the first portion. The third electrode surrounds the second electrode and is electrically connected to the fourth region. The semi-insulating layer is electrically connected to the second electrode and the third electrode. A first end portion of the first insulating layer is above the third region.
    Type: Application
    Filed: August 27, 2019
    Publication date: September 17, 2020
    Inventors: Kazuki MINAMIKAWA, Yukie NISHIKAWA, Kotaro ZAIMA
  • Patent number: 9991418
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting layer, a current spreading layer of a first conductivity type, and a pad electrode. The light emitting layer is capable of emitting light. The current spreading layer has a first surface and a second surface. The light emitting layer is disposed on a side of the first surface. A light extraction surface having convex structures of triangle cross-sectional shape and a flat surface which is a crystal growth plane are included in the second surface. The pad electrode is provided on the flat surface. One base angle of the convex structure is 90 degrees or more.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: June 5, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Yamasaki, Katsuyoshi Furuki, Yukie Nishikawa
  • Patent number: 9947574
    Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first conductive layer provided on the first insulating film, a second insulating film provided on the semiconductor layer and the first conductive layer, a second conductive layer provided on the second insulating film, a first contact portion connecting the semiconductor layer and the second conductive layer, and a second contact portion connecting the first conductive layer and the second conductive layer. A distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the second contact portion is greater than a distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the first contact portion. The second contact portion has a larger width than the first contact portion.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: April 17, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukie Nishikawa, Motoya Kishida
  • Patent number: 9853023
    Abstract: A semiconductor package in an embodiment includes a semiconductor device which has a first semiconductor element, a second semiconductor element, and a common first electrode between the first and second semiconductor elements. A second electrode is electrically connected to the first semiconductor element. A third electrode extends through the second semiconductor element and electrically connects to the first electrode. A fourth electrode is electrically connected to the second semiconductor element. A first terminal of the package is electrically connected to the third electrode. A second terminal of the package is electrically connected to the second electrode and the fourth electrode. An insulating material surrounds the semiconductor device.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: December 26, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Kenya Kobayashi, Yukie Nishikawa
  • Patent number: 9741838
    Abstract: A semiconductor device includes a plurality of gate electrodes. Each gate electrode includes a first portion extending from a first end to a second end and a second portion extending parallel the first portion from a first end to a second end. The first and second portions are spaced from each other. A third portion of at least one gate electrode connects the first end of the first portion to the first end of the second portion of the gate electrode. A first insulating film is on the plurality of gate electrodes. A first interconnect portion is disposed on the first or second portion the gate electrode to electrically connecting the gate electrode to a gate pad. A second interconnect portion is disposed on semiconductor regions between the gate electrodes and electrically connects the semiconductor regions to an emitter pad.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: August 22, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukie Nishikawa, Masaki Okazaki
  • Publication number: 20170213902
    Abstract: A semiconductor device includes a plurality of gate electrodes. Each gate electrode includes a first portion extending from a first end to a second end and a second portion extending parallel the first portion from a first end to a second end. The first and second portions are spaced from each other. A third portion of at least one gate electrode connects the first end of the first portion to the first end of the second portion of the gate electrode. A first insulating film is on the plurality of gate electrodes. A first interconnect portion is disposed on the first or second portion the gate electrode to electrically connecting the gate electrode to a gate pad. A second interconnect portion is disposed on semiconductor regions between the gate electrodes and electrically connects the semiconductor regions to an emitter pad.
    Type: Application
    Filed: August 18, 2016
    Publication date: July 27, 2017
    Inventors: Yukie NISHIKAWA, Masaki OKAZAKI
  • Publication number: 20170117269
    Abstract: A semiconductor package in an embodiment includes a semiconductor device which has a first semiconductor element, a second semiconductor element, and a common first electrode between the first and second semiconductor elements. A second electrode is electrically connected to the first semiconductor element. A third electrode extends through the second semiconductor element and electrically connects to the first electrode. A fourth electrode is electrically connected to the second semiconductor element. A first terminal of the package is electrically connected to the third electrode. A second terminal of the package is electrically connected to the second electrode and the fourth electrode. An insulating material surrounds the semiconductor device.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Yasuhiko AKAIKE, Kenya KOBAYASHI, Yukie NISHIKAWA
  • Publication number: 20170077218
    Abstract: Provided is a semiconductor device including a first electrode, a second electrode, a semiconductor substrate having a first plane, a second plane, a first conductivity-type first region, and a plurality of second conductivity-type second regions provided around the first electrode, the second regions being in contact with the first plane, at least a portion of the semiconductor substrate being provided between the first electrode and the second electrode, a first insulating film provided on or above the second regions, the first insulating film including positive charges, and a second insulating film provided on or above the second regions, second insulating film including negative charges.
    Type: Application
    Filed: February 12, 2016
    Publication date: March 16, 2017
    Inventors: Yukie Nishikawa, Yasuhiko Akaike, Masaki Okazaki
  • Patent number: 9570439
    Abstract: A semiconductor device includes a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, a first electrode, a third semiconductor region of the second conductive type, a fourth semiconductor region of the first conductive type, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The first electrode is provided on the second semiconductor region. The third semiconductor region is provided on the first electrode. The fourth semiconductor region is provided on the third semiconductor region. The conductive portion is surrounded by the third semiconductor region and an intervening insulation portion and is electrically connected to the first electrode.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Kenya Kobayashi, Yukie Nishikawa
  • Publication number: 20160268193
    Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first conductive layer provided on the first insulating film, a second insulating film provided on the semiconductor layer and the first conductive layer, a second conductive layer provided on the second insulating film, a first contact portion connecting the semiconductor layer and the second conductive layer, and a second contact portion connecting the first conductive layer and the second conductive layer. A distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the second contact portion is greater than a distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the first contact portion. The second contact portion has a larger width than the first contact portion.
    Type: Application
    Filed: September 15, 2015
    Publication date: September 15, 2016
    Inventors: Yukie Nishikawa, Motoya Kishida
  • Publication number: 20160268254
    Abstract: A semiconductor device includes a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, a first electrode, a third semiconductor region of the second conductive type, a fourth semiconductor region of the first conductive type, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The first electrode is provided on the second semiconductor region. The third semiconductor region is provided on the first electrode. The fourth semiconductor region is provided on the third semiconductor region. The conductive portion is surrounded by the third semiconductor region and an intervening insulation portion and is electrically connected to the first electrode.
    Type: Application
    Filed: August 31, 2015
    Publication date: September 15, 2016
    Inventors: Yasuhiko AKAIKE, Kenya KOBAYASHI, Yukie Nishikawa
  • Publication number: 20160149081
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting layer, a current spreading layer of a first conductivity type, and a pad electrode. The light emitting layer is capable of emitting light. The current spreading layer has a first surface and a second surface. The light emitting layer is disposed on a side of the first surface. A light extraction surface having convex structures of triangle cross-sectional shape and a flat surface which is a crystal growth plane are included in the second surface. The pad electrode is provided on the flat surface. One base angle of the convex structure is 90 degrees or more.
    Type: Application
    Filed: February 1, 2016
    Publication date: May 26, 2016
    Inventors: Hironori Yamasaki, Katsuyoshi Furuki, Yukie Nishikawa
  • Patent number: 9287448
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting layer, a current spreading layer of a first conductivity type, and a pad electrode. The light emitting layer is capable of emitting light. The current spreading layer has a first surface and a second surface. The light emitting layer is disposed on a side of the first surface. A light extraction surface having convex structures of triangle cross-sectional shape and a flat surface which is a crystal growth plane are included in the second surface. The pad electrode is provided on the flat surface. One base angle of the convex structure is 90 degrees or more.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: March 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Yamasaki, Katsuyoshi Furuki, Yukie Nishikawa
  • Publication number: 20160056335
    Abstract: According to an embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a dielectric film and an electrode. The first semiconductor layer is capable of emitting light. The second semiconductor layer has a first major surface in contact with the first semiconductor layer and a second major surface opposite to the first major surface, the second major surface including a first region having convex structures and a second region not having the convex structures. The dielectric film is provided at least at a tip portion of the convex structures, and the electrode is provided above the second region.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 25, 2016
    Inventors: Hironori Yamasaki, Yukie Nishikawa