Abstract: A fabrication method of a semiconductor device with a capacitor is provided, which prevents leakage current from increasing and dielectric breakdown resistance from decreasing during a CVD or dry etching process for forming an insulating film to cover the capacitor. In this method, a lower electrode of a capacitor is formed on a first insulating film. The first insulating film is typically formed on or over a semiconductor substrate. A dielectric film of the capacitor is formed on the lower electrode to be overlapped therewith. An upper electrode of the capacitor is formed on the dielectric film to be overlapped therewith. A second insulating film is formed to cover the capacitor by a thermal CVD process in an atmosphere containing no plasma at a substrate temperature in which hydrogen is prevented from being activated due to heat.

Abstract: A method of forming a capacitor element is provided. After the barrier layer is formed on the dielectric layer, the lower electrode layer, the ferroelectric layer, and the upper electrode layer are formed on the barrier layer in this order. Thereafter, the etching mask having a pattern for a desired capacitor element is formed on the upper electrode layer. Using the etching mask, the upper electrode layer, the ferroelectric layer, the lower electric layer, and the barrier layer are selectively removed by dry etching. The etching gas containing fluorine (F) as one of its constituent elements is used in the step of selectively removing the barrier layer. The mask layer is etched back by an etching action in the same step, thereby eliminating the mask layer. The aspect ratio of the contact hole that exposes the upper capacitor electrode can be decreased by the thickness of the remaining mask layer. Therefore, a desired capacitor element can be formed by using a process (e.g.

Abstract: In the manufacture of an integrated circuit memory capacitor, an underlying hydrogen barrier layer, either electrically nonconductive or conductive, is formed on a substrate. Then, the lower electrode layer and the ferroelectric/dielectric layer are formed and selectively etched. A nonconductive hydrogen barrier layer is formed on the dielectric layer and selectively etched. After a heat treatment in oxygen, the upper electrode layer and a conductive hydrogen barrier layer are successively deposited and selectively etched. The nonconductive hydrogen barrier layer covers the capacitor except for a part of the upper electrode, and the conductive hydrogen barrier layer covers a portion where there is no nonconductive hydrogen barrier layer. Thus, the underlying barrier layer, the nonconductive barrier layer and the conductive barrier layer together completely cover the memory capacitor. The dielectric layer comprises a ferroelectric or high-dielectric constant metal oxide.

Abstract: The present invention provides a method of patterning top and bottom electrodes of a capacitor. The method comprises the steps of: selectively forming a first mask made of a first material which has a barrier property to hydrogen on a top electrode of the capacitor; selectively etching a top electrode layer and a capacitive dielectric film by use of the first mask; without removing the first mask from the top electrode, selectively forming a second mask made of a second material which has a barrier property to hydrogen so that the second mask covers the first mask, the top electrode and the capacitive dielectric film and also covers a bottom electrode layer; and selectively etching a bottom electrode layer.

Abstract: In the manufacture of an integrated circuit memory capacitor, an underlying hydrogen barrier layer, either electrically nonconductive or conductive, is formed on a substrate. Then, the lower electrode layer and the ferroelectric/dielectric layer are formed and selectively etched. A nonconductive hydrogen barrier layer is formed on the dielectric layer and selectively etched. After a heat treatment in oxygen, the upper electrode layer and a conductive hydrogen barrier layer are successively deposited and selectively etched. The nonconductive hydrogen barrier layer covers the capacitor except for a part of the upper electrode, and the conductive hydrogen barrier layer covers a portion where there is no nonconductive hydrogen barrier layer. Thus, the underlying barrier layer, the nonconductive barrier layer and the conductive barrier layer together completely cover the memory capacitor. The dielectric layer comprises a ferroelectric or high-dielectric constant metal oxide.

Abstract: A method of forming a capacitor by forming a dielectric layer over a bottom electrode layer, forming a top electrode layer over the dielectric layer to form laminations of the bottom electrode layer, the dielectric layer and the top electrode layer, and selectively etching the laminations to form a capacitor, the dielectric layer being etched by a reactive ion etching so that the dielectric layer of the capacitor receives no substantive damage in the etching process.