Abstract: A method is provided to optimize the channel characteristics of thin film transistors (TFTs) on polysilicon films. The method is well suited to the production of TFTs for use as drivers on liquid crystal display devices. Regions of polycrystalline silicon can be formed with different predominant crystal orientations. These crystal orientations can be selected to match the desired TFT channel orientations for different areas of the device. The crystal orientations are selected by rotating a mask pattern to a different orientation for each desired crystal orientation. The mask is used in connection with lateral crystallization ELA processes to crystallize deposited amorphous silicon films.

Abstract: A method of forming a thin film device includes preparing a substrate; forming a silicon target having predetermined impurities therein; depositing a layer of amorphous silicon by physical vapor deposition from the target; and crystallizing the amorphous silicon layer to form a polysilicon layer. The method of the invention is particularly suited to the formation of thin film transistors and liquid crystal displays incorporating thin film transistors.

Abstract: A method of physical vapor deposition includes selecting a target material; mixing at least two gases to form a sputtering gas mixture, wherein a first sputtering gas is helium and a second sputtering gas is taken from the gases consisting of neon, argon krypton, xenon and radon; forming a plasma in the sputtering gas mixture atmosphere to sputter atoms from the target material to the substrate thereby forming a layer of target material on the substrate and annealing the substrate and the deposited layer thereon. An improved physical vapor deposition vacuum chamber includes a target held in a target holder, a substrate held in a substrate holder, a plasma arc generator, and heating rods. A sputtering gas feed system is provided for introducing a mixture of sputtering gases into the chamber; as is a vacuum mechanism comprising at least one turbomolecular pump for evacuating the chamber to a pressure of less than 16 mTorr during deposition.

Abstract: A method is provided to optimize the channel characteristics of thin film transistors (TFTs) on polysilicon films. The method is well suited to the production of TFTs for use as drivers on liquid crystal display devices. Regions of polycrystalline silicon can be formed with different predominant crystal orientations. These crystal orientations can be selected to match the desired TFT channel orientations for different areas of the device. The crystal orientations are selected by rotating a mask pattern to a different orientation for each desired crystal orientation. The mask is used in connection with lateral crystallization ELA processes to crystallize deposited amorphous silicon films.

Abstract: A method is provided to optimize the channel characteristics of thin film transistors (TFTs) on polysilicon films. The method is well suited to the production of TFTs for use as drivers on liquid crystal display devices. The method is also well suited to the production of other devices using polysilicon films. Regions of polycrystalline silicon can be formed with different predominant crystal orientations. These crystal orientations can be selected to match the desired TFT channel orientations for different areas of the device. The crystal orientations are selected by selecting different mask patterns for each of the desired crystal orientation. The mask patterns are used in connection with lateral crystallization ELA processes to crystallize deposited amorphous silicon films.

Abstract: A method for forming an insulator film at a semiconductor temperature of 600° C. or less comprises the steps of forming a first insulator film by oxidizing a surface of a semiconductor in an atmosphere containing oxygen atom radicals, and forming a second insulator film on the first insulator film by deposition without exposing the first insulator film to outside air.

Abstract: A TFT fabricated from a single crystal grain, and fabrication method has been provided. A large crystal grain is made by precise control of annealment, transition metal concentration, the density of transition metal nucleation sites, and the distance between nucleation sites. In one aspect of the invention, a diffusion layer permits the continual delivery of transition metal at a rate that both supports the lateral growth of di-silicide, and large distances between nucleation sites.

Abstract: A TFT fabricated from a single crystal grain, and fabrication method has been provided. A large crystal grain is made by precise control of annealment, transition metal concentration, the density of transition metal nucleation sites, and the distance between nucleation sites. In one aspect of the invention, a diffusion layer permits the continual delivery of transition metal at a rate that both supports the lateral growth of di-silicide, and large distances between nucleation sites.

Abstract: A method has been provided to form a sheet of large grain crystallized silicon, in an early stage of transistor production, before the areas of the source and drain are defined. The method takes advantage of high annealing temperatures and transition metals to speed the lateral growth of silicide. By using higher temperatures, the number of amorphous enclaves is minimized and the transition metal nucleation site can be made small. A small transition metal nucleation site, in turn, can be more easily located near the center of a transistor, or where it is convenient. After annealing, the areas close to the silicide nucleation site are transformed into polycrystalline with a high electron mobility, desirable for the formation of source/drain and channel regions. Silicide products, away from the transistor active areas, are etched away when the area of the source and drain are defined. A product by process using the method of the above-described invention is also provided.

Abstract: A TFT fabricated from a single crystal grain, and fabrication method has been provided. A large crystal grain is made by precise control of annealment, transition metal concentration, the density of transition metal nucleation sites, and the distance between nucleation sites. In one aspect of the invention, a diffusion layer permits the continual delivery of transition metal at a rate that both supports the lateral growth of di-silicide, and large distances between nucleation sites.

Abstract: A thin film transistor includes: a substrate; a gate electrode, a source electrode and a drain electrode formed above the substrate; and an insulating film and a semiconductor film formed between the gate electrode, and the source electrode and the drain electrode, wherein the semiconductor film includes an i-type silicon film, and a portion of the semiconductor film within 50 nm from the insulating film has a microcrystalline structure having a conductivity of 5×10−10 S/cm or more.

Abstract: A method has been provided to form a sheet of large grain crystallized silicon, in an early stage of transistor production, before the areas of the source and drain are defined. The method takes advantage of high annealing temperatures and transition metals to speed the lateral growth of silicide. By using higher temperatures, the number of amorphous enclaves is minimized and the transition metal nucleation site can be made small. A small transition metal nucleation site, in turn, can be more easily located near the center of a transistor, or where it is convenient. After annealing, the areas close to the silicide nucleation site are transformed into polycrystalline with a high electron mobility, desirable for the formation of source/drain and channel regions. Silicide products, away from the transistor active areas, are etched away when the area of the source and drain are defined. A product by process using the method of the above-described invention is also provided.

Abstract: A method has been provided to form a sheet of large grain crystallized silicon, in an early stage of transistor production, before the areas of the source and drain are defined. The method takes advantage of high annealing temperatures and transition metals to speed the lateral growth of silicide. By using higher temperatures, the number of amorphous enclaves is minimized and the transition metal nucleation site can be made small. A small transition metal nucleation site, in turn, can be more easily located near the center of a transistor, or where it is convenient. After annealing, the areas close to the silicide nucleation site are transformed into polycrystalline with a high electron mobility, desirable for the formation of source/drain and channel regions. Silicide products, away from the transistor active areas, are etched away when the area of the source and drain are defined. A product by process using the method of the above-described invention is also provided.

Abstract: A thin film transistor includes: an insulating film having a surface; a semiconductor film formed on the surface of the insulating film; a source electrode and a drain electrode which are in contact with the semiconductor film; and a gate electrode which is electrically insulated from the semiconductor film. In the thin film transistor, a portion of the semiconductor film at distances of less than 500 angstroms from the surface of the insulating film contains at least silicon including a microcrystalline structure having a conductivity of 5.times.10.sup.-9 S/cm or more. Also, a method for fabricating such a thin film transistor is disclosed.

Abstract: A thin film transistor includes: a substrate; a gate electrode, a source electrode and a drain electrode formed above the substrate; and an insulating film and a semiconductor film formed between the gate electrode, and the source electrode and the drain electrode, wherein the semiconductor film includes an i-type silicon film, and a portion or the semiconductor film within 50 nm from the insulating film has a microcrystalline structure having a conductivity of 5.times.10.sup.-10 S/cm or more.

Abstract: A thin film transistor includes: an insulating film having a surface; a semiconductor film formed on the surface of the insulating film; a source electrode and a drain electrode which are in contact with the semiconductor film; and a gate electrode which is electrically insulated from the semiconductor film. In the thin film transistor, a portion of the semiconductor film at distances of less than 500 angstroms from the surface of the insulating film contains at least silicon including a microcrystalline structure having a conductivity of 5.times.10.sup.-9 S/cm or more. Also, a method for fabricating such a thin film transistor is disclosed.

Abstract: A photovoltaic device includes a semi-continuous metal layer having an uneven surface, which is not uniform, formed on a substrate, a reflective continuous metal layer having a substantially uniform thickness formed to cover the semi-continuous metal layer, a semiconductor film for photoelectric conversion formed on the reflective continuous metal layer, and a transparent electrode formed on the semiconductor film.

Abstract: An amorphous semiconductor solar cell includes an i type layer which is an at least partially alloyed, substantially intrinsic semiconductor, an n type layer formed on one side of the i type layer, and a p type layer formed n the other side of the i type layer, and the i type layer has its energy bandgap varied in a thickness direction to have a bandgap larger than the bandgap of the p type layer in the vicinity of the interface with the p type layer.

Abstract: An amorphous solar cell is provided having a junction structure of a p layer, an i layer and n layer where an electromotive force is generated when the cell is irradiated by light. The amorphous solar cell includes an upper cell and a lower cell which each have an i layer. The upper and lower cells are stacked so that the upper cell is located on the light incident side. An output end of the upper cell and an output end of the lower cell are connected in parallel. The thickness of the i layer of the lower cell is 3000 .ANG. or less. Because the thickness of the i layer of the lower cell is 3000 .ANG. or less, the amorphous solar cell has a high initial photoelectric conversion efficiency and properties which are unlikely to be degraded by light.

Abstract: An improved DC-AC converting arrangement for a photovoltaic system, which makes it possible to supply power at high efficiency by providing a driving control system arranged to stop operation of a DC-AC converter when a load power of the DC-AC converter falls below a predetermined reference value, and to restart the operation of the DC-AC converter when the load power exceeds the predetermined reference value.