Patents by Inventor Yukihiro Iguchi

Yukihiro Iguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942003
    Abstract: The visibility of the external scene from the inside of the transmissive transparent screen when the video image is not displayed and the visibility of the video image from the outside when the video image is displayed are satisfied. In a video image display system comprising a projection device 100 and a transmissive transparent screen 1 having a first surface and a second surface on the opposite side of the first surface, having a visible light transmittance of at least 5[%], and displaying video images projected from the projection device 100 installed on the first surface side, as video images visible to an observer on the second surface side, the following formula 1 is satisfied: ?1.5?ln(((B/A)/I)×G)?3.9??Formula 1 in the formula 1, A is the projection area [m2] of the projection device 100, B is the luminous flux [lm] projected onto A by the projection device 100, I is the ambient illuminance [lx] at the side of the second surface, and G is the screen gain of the transparent screen 1.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: March 26, 2024
    Assignee: AGC Inc.
    Inventors: Hideaki Hayashi, Yoshinori Iguchi, Yukihiro Tao
  • Patent number: 7844924
    Abstract: A device for logic synthesis that can be used to synthesize LUT logic circuit having intermediate outputs for multiple-output logic functions.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: November 30, 2010
    Assignee: Kitakyushu Foundation for the Advancement of Industry, Science and Technology
    Inventors: Tsutomu Sasao, Yukihiro Iguchi
  • Patent number: 7486109
    Abstract: The PLD that can change the number of input lines and the number of rail between the memories for logic according to the objective logic function, and to which the optimum design can be done to make the size of memory minimum. The memories for logic (4) are arranged in series, and LUT is memorized in them. The input variables are input from the external input lines to each memories for logic (4). The interconnection circuit (5) connects the output lines or the external input lines of memory for logic (4) in the preceding stage and the input lines of memory for logic (4) of the succeeding stage between two memories for logic (4), according to the information for connection memorized in memory for interconnections (6). By rewriting the information for connection according to the objective logic function, the interconnection circuit can be reconfigured, and the number of input lines and the number of rail can be changed.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 3, 2009
    Assignee: Kitakyushu Foundation for the Advancement of Industry, Science and Technology
    Inventors: Tsutomu Sasao, Yukihiro Iguchi
  • Publication number: 20080204072
    Abstract: The invention relates to a connector (10) for connecting welding torch where the connector comprises a connector body (12) made of electrically insulating material, a cylindrical current transferring body (30) fitted on the cylindrical front part (13) of the connector body (12), made of electrically conductive material, where the current transferring body (30) has a threaded surface (32) and a side contact surface (35) besides the threaded surface (32) on its side surface, a threaded bore (37) on the side contact surface (35) for fixing current cable with screwed joint and a frontal contact surface (33), further an attachment bracket (60), made of electrically insulating plastic, the attachment bracket (60) has a sleeve part (62), which encircles space apart the threaded surface (32) and the sleeve part (62) has a flange (64) protruding from its front part for fixing, the flange (64) is provided with one or more holes (65) in it.
    Type: Application
    Filed: March 31, 2004
    Publication date: August 28, 2008
    Inventors: Tsutomu Sasao, Yukihiro Iguchi
  • Publication number: 20070174804
    Abstract: The object of the present invention is to present a device for logic synthesis that can be used to synthesize LUT logic circuit having intermediate outputs for multiple-output logic functions.
    Type: Application
    Filed: November 19, 2004
    Publication date: July 26, 2007
    Inventors: Tsutomu Sasao, Yukihiro Iguchi