Patents by Inventor Yukihiro Sasagawa
Yukihiro Sasagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230335016Abstract: A map information update method includes: obtaining one or more projection relationships; obtaining, for each projection relationship, reprojection error information; calculating, for each of one or more landmarks, a first sum value based on all items of reprojection error information associated with the landmark; calculating, for each of one or more keyframes, a second sum value based on all items of reprojection error information associated with the keyframe; inferring from the first sum value, for each landmark, a position information update value of an item of position information about the landmark, and updating the item of position information about the landmark using the position information update value; and inferring from the second sum value, for each keyframe, a pose information update value of an item of pose information about the keyframe, and updating the item of pose information about the keyframe using the pose information update value.Type: ApplicationFiled: June 26, 2023Publication date: October 19, 2023Inventors: Tetsuya TANAKA, Yukihiro SASAGAWA
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Patent number: 11748600Abstract: A quantization parameter optimization method includes: determining a cost function in which a regularization term is added to an error function, the regularization term being a function of a quantization error that is an error between a weight parameter of a neural network and a quantization parameter that is a quantized weight parameter; updating the quantization parameter by use of the cost function; and determining, as an optimized quantization parameter of a quantization neural network, the quantization parameter with which a function value derived from the cost function satisfies a predetermined condition, the optimized quantization parameter being obtained as a result of repeating the updating, the quantization neural network being the neural network, the weight parameter of which has been quantized, wherein the function value derived from the regularization term and an inference accuracy of the quantization neural network are negatively correlated.Type: GrantFiled: September 8, 2020Date of Patent: September 5, 2023Assignee: SOCIONEXT INC.Inventor: Yukihiro Sasagawa
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Publication number: 20230046001Abstract: A map information update method includes: (a) obtaining map information; (b) obtaining landmark observed positions indicating positions of one or more landmarks in a captured image; (c) adding that includes (i) generating added map information by adding information pertaining to the landmark observed positions to the map information, and (ii) updating the map information obtained in (a) to the added map information; (d) predicting that includes (i) calculating predicted map information based on the map information updated in (c), by using a neural network inference engine that has been trained, and (ii) updating the map information to the predicted map information; and updating information that includes (i) calculating updated map information based on the map information updated in (d), by using a gradient method, and (ii) updating the map information to the updated map information.Type: ApplicationFiled: October 27, 2022Publication date: February 16, 2023Inventors: Tetsuya TANAKA, Yukihiro SASAGAWA
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Publication number: 20230042275Abstract: A network quantization method is a network quantization method of quantizing a neural network, and includes a database construction step of constructing a statistical information database on tensors that are handled by neural network, a parameter generation step of generating quantized parameter sets by quantizing values included in each tensor in accordance with the statistical information database and the neural network, and a network construction step of constructing a quantized network by quantizing the neural network with use of the quantized parameter sets. The parameter generation step includes a quantization-type determination step of determining a quantization type for each of a plurality of layers that make up the neural network.Type: ApplicationFiled: October 14, 2022Publication date: February 9, 2023Inventor: Yukihiro SASAGAWA
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Publication number: 20220398693Abstract: A color image inpainting method includes: obtaining a color image of an object to be recognized, the color image including a missing portion where at least part of image information is missing; obtaining an infrared image of the object; identifying the missing portion in the color image; and inpainting the missing portion in the color image identified in the identifying. The inpainting includes inpainting the missing portion by using information which is obtained from the infrared image and corresponds to the missing portion to obtain an inpainted color image of the object.Type: ApplicationFiled: August 19, 2022Publication date: December 15, 2022Inventor: Yukihiro SASAGAWA
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Publication number: 20220036160Abstract: An inference model generating method is a method for generating a third inference model using a trained first inference model and a trained second inference model, when a type of output data that is output from the first inference model is the same as a type of input data that is input to the second inference model, the method including: preparing a first partial inference model that includes a portion of the first inference model from an input layer through a predetermined intermediate layer; preparing a second partial inference model that includes a portion of the second inference model from a predetermined intermediate layer to an output layer; and generating the third inference model by disposing a glue layer between the first partial inference model and the second partial inference model.Type: ApplicationFiled: October 20, 2021Publication date: February 3, 2022Inventor: Yukihiro SASAGAWA
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Publication number: 20210248463Abstract: A neural network derivation method includes: (1) training a first neural network having a first parameter, using a first loss function for optimization; and (2) training the first neural network using a second loss function for optimization, after (1), the second loss function being obtained by adding a regularization term to the first loss function. After a second neural network having a second parameter obtained by adding a variation to the first parameter based on the first neural network is derived, the regularization term is determined based on a correlation between a latent feature of the first neural network and a latent feature of the second neural network or a correlation between an inferred value of the first neural network and an inferred value of the second neural network.Type: ApplicationFiled: February 2, 2021Publication date: August 12, 2021Inventor: Yukihiro SASAGAWA
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Publication number: 20210209470Abstract: A network quantization method of quantizing a neural network includes: constructing a statistical information database of tensors handled by the neural network obtained when a plurality of test datasets are input to the neural network; generating a quantization parameter set by quantizing values of the tensors; and quantizing the neural network using the quantization parameter set. In the generating, based on the statistical information database, a quantization step interval in a high-frequency region is set to be narrower than a quantization step interval in a low-frequency region, the high-frequency region including a value, among the values of the tensors, having a frequency that is a maximum, and the low-frequency region including a value of the tensors that has a lower frequency than in the high-frequency region and a frequency that is not zero.Type: ApplicationFiled: March 23, 2021Publication date: July 8, 2021Inventor: Yukihiro SASAGAWA
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Publication number: 20210073635Abstract: A quantization parameter optimization method includes: determining a cost function in which a regularization term is added to an error function, the regularization term being a function of a quantization error that is an error between a weight parameter of a neural network and a quantization parameter that is a quantized weight parameter; updating the quantization parameter by use of the cost function; and determining, as an optimized quantization parameter of a quantization neural network, the quantization parameter with which a function value derived from the cost function satisfies a predetermined condition, the optimized quantization parameter being obtained as a result of repeating the updating, the quantization neural network being the neural network, the weight parameter of which has been quantized, wherein the function value derived from the regularization term and an inference accuracy of the quantization neural network are negatively correlated.Type: ApplicationFiled: September 8, 2020Publication date: March 11, 2021Inventor: Yukihiro SASAGAWA
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Patent number: 10074187Abstract: An image recognition system for detecting and tracking at least an image portion associated with a predefined object from a moving picture is configured to be able to perform: an object detection processing step of detecting the object; a tracking point specification processing step of specifying a predetermined point as a tracking point; a tracking target recognition processing step of recognizing an actual tracking target based on the tracking point; a tracking processing step of tracking the tracking target; and a determination processing step of determining the type of the tracking target's behavior. The tracking point specification processing step and the determination processing step are implemented by software, while the object detection processing step, the tracking target recognition processing step, and the tracking processing step are implemented by hardware.Type: GrantFiled: August 25, 2016Date of Patent: September 11, 2018Assignee: SOCIONEXT INC.Inventors: Yukihiro Sasagawa, Tatsuya Tetsukawa, Michael Bi Mi, Chua Tien Ping, Ryuta Nakanishi, Naoki Nojiri
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Publication number: 20160364882Abstract: An image recognition system for detecting and tracking at least an image portion associated with a predefined object from a moving picture is configured to be able to perform: an object detection processing step of detecting the object; a tracking point specification processing step of specifying a predetermined point as a tracking point; a tracking target recognition processing step of recognizing an actual tracking target based on the tracking point; a tracking processing step of tracking the tracking target; and a determination processing step of determining the type of the tracking target's behavior. The tracking point specification processing step and the determination processing step are implemented by software, while the object detection processing step, the tracking target recognition processing step, and the tracking processing step are implemented by hardware.Type: ApplicationFiled: August 25, 2016Publication date: December 15, 2016Inventors: Yukihiro SASAGAWA, Tatsuya TETSUKAWA, Michael Bi MI, Chua Tien PING, Ryuta NAKANISHI, Naoki NOJIRI
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Patent number: 8723777Abstract: A panel control device includes a programmable array. This programmable array operates in accordance with a configuration code and includes a plurality of first-class elements and at least one second-class element. This provides a panel control device requiring a small circuit area, being suitable for system-on-chip (SoC) mounting, and driving a liquid crystal display device having various specifications also in the future.Type: GrantFiled: July 27, 2012Date of Patent: May 13, 2014Assignee: Panasonic CorporationInventors: Minoru Okamoto, Ryutaro Yamanaka, Kazuhiro Okabayashi, Yukihiro Sasagawa
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Patent number: 8694451Abstract: A neural network system that can minimize circuit resources for constituting a self-learning mechanism and be reconfigured into network configurations suitable for various purposes includes a neural network engine that operates in a first and a second operation mode and performs an operation representing a characteristic determined by setting network configuration information and weight information with respect to the network configuration, and a von Neumann-type microprocessor that is connected to the neural network engine and performs a cooperative operation in accordance with the first or the second operation mode together with the neural network engine. The von Neumann-type microprocessor recalculates the weight information or remakes the configuration information as a cooperative operation according to the first operation mode, and sets or updates the configuration information or the weight information set in the neural network engine, as a cooperative operation according to the second operation mode.Type: GrantFiled: September 15, 2011Date of Patent: April 8, 2014Assignee: Panasonic CorporationInventor: Yukihiro Sasagawa
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Publication number: 20120293526Abstract: A panel control device includes a programmable array. This programmable array operates in accordance with a configuration code and includes a plurality of first-class elements and at least one second-class element. This provides a panel control device requiring a small circuit area, being suitable for system-on-chip (SoC) mounting, and driving a liquid crystal display device having various specifications also in the future.Type: ApplicationFiled: July 27, 2012Publication date: November 22, 2012Applicant: PANASONIC CORPORATIONInventors: Minoru OKAMOTO, Ryutaro YAMANAKA, Kazuhiro OKABAYASHI, Yukihiro SASAGAWA
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Patent number: 8094950Abstract: A data compressing method comprises first step in which a data is orthogonally transformed so that an orthogonal transform data is generated. A processing step executed subsequent to the first step is divided into a processing step for an alternate-current component of the orthogonal transform data and a processing step for a direct-current component of the orthogonal transform data. The processing step for the direct-current component includes a second step in which an inverse transform equivalent to a decoding process of the orthogonal transform data is executed on the orthogonal transform data.Type: GrantFiled: March 7, 2007Date of Patent: January 10, 2012Assignee: Panasonic CorporationInventor: Yukihiro Sasagawa
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Publication number: 20120005141Abstract: A neural network system that can minimize circuit resources for constituting a self-learning mechanism and be reconfigured into network configurations suitable for various purposes includes a neural network engine that operates in a first and a second operation mode and performs an operation representing a characteristic determined by setting network configuration information and weight information with respect to the network configuration, and a von Neumann-type microprocessor that is connected to the neural network engine and performs a cooperative operation in accordance with the first or the second operation mode together with the neural network engine. The von Neumann-type microprocessor recalculates the weight information or remakes the configuration information as a cooperative operation according to the first operation mode, and sets or updates the configuration information or the weight information set in the neural network engine, as a cooperative operation according to the second operation mode.Type: ApplicationFiled: September 15, 2011Publication date: January 5, 2012Applicant: PANASONIC CORPORATIONInventor: Yukihiro SASAGAWA
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Patent number: 7920002Abstract: A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of the n first pulse signals are at the low level. Each of n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals. Each of n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals. A current mirror circuit allows a current corresponding to a current flowing through the second node to flow through the first node.Type: GrantFiled: June 5, 2008Date of Patent: April 5, 2011Assignee: Panasonic CorporationInventors: Shiro Sakiyama, Yusuke Tokunaga, Shiro Dosho, Akinori Matsumoto, Takashi Morie, Kazuaki Sogawa, Yukihiro Sasagawa, Masaya Sumita
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Patent number: 7853844Abstract: A semiconductor integrated circuit system has a control target circuit executing a program, a system information monitor unit for outputting system information indicating a state of the control target circuit, a circuit characteristic monitor unit for determining a circuit characteristic of the control target circuit and outputting the circuit characteristic as circuit characteristic information, a malfunction determination unit for determining whether or not the control target circuit is normally operating based on the system information, a reference circuit characteristic holding unit for holding the circuit characteristic information as reference circuit characteristic information when the control target circuit is normally operating, a malfunction factor determination unit for determining a malfunction factor based on the circuit characteristic information and on the reference circuit characteristic information when the control target circuit is not normally operating, and a correction target determinatioType: GrantFiled: April 17, 2007Date of Patent: December 14, 2010Assignee: Panasonic CorporationInventor: Yukihiro Sasagawa
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Patent number: 7830178Abstract: The dynamic circuit includes: a dynamic node; an evaluation circuit for changing the charged state of the dynamic node according to a result of logic evaluation for a plurality of input signals; a control circuit for outputting a control signal of which the logic level changes according to the result of logic evaluation performed by a replica of the evaluation circuit; and an initialization circuit for receiving the control signal from the control circuit and an external control signal, to control start and stop of initialization of the dynamic node according to the control signals.Type: GrantFiled: January 30, 2007Date of Patent: November 9, 2010Assignee: Panasonic CorporationInventor: Yukihiro Sasagawa
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Publication number: 20090167346Abstract: The present invention is intended to provide a reconfigurable circuit, a configuration method and a program capable of significantly shortening the configuration time without increasing the area of the chip of the circuit. The reconfigurable circuit equipped with a configuration chain having multiple serial connection registers, comprises first connecting means for connecting the registers inside a first serial connection register and the registers inside a second serial connection register in series, and second connecting means for connecting the registers inside the first serial connection register and the registers inside the second serial connection register in parallel, wherein duplication is made possible by using the second connecting means as bypasses.Type: ApplicationFiled: December 23, 2008Publication date: July 2, 2009Inventor: Yukihiro SASAGAWA