Patents by Inventor Yukihiro Tanemura

Yukihiro Tanemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8420498
    Abstract: An alignment method of chips that are formed on a surface of a semiconductor wafer with alignment marks corresponding to the chips includes the steps of irradiating an alignment mark corresponding to a predetermined alignment chip in a predetermined area including the chips with a laser light; detecting reflected waves from the alignment mark of the predetermined alignment chip to obtain a position of the alignment mark of the predetermined alignment chip; irradiating an alignment mark of an alternative chip different from the predetermined alignment chip with the laser light in case of not being able to obtain the position of the alignment mark of the predetermined alignment chip; obtaining a position of the alignment mark of the alternative chip by detecting the reflected waves from the alignment mark of the alternative chip; and aligning the chips in the predetermined area based on positions of alignment marks including the position of the alignment mark of the alternative chip.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: April 16, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Yukihiro Tanemura
  • Patent number: 7781901
    Abstract: A disclosed semiconductor device includes a semiconductor substrate including semiconductor integrated circuit forming areas; semiconductor integrated circuits formed on the semiconductor integrated circuit forming areas; and an alignment pattern formed on a periphery of at least one of the semiconductor integrated circuit forming areas.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: August 24, 2010
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Yukihiro Tanemura
  • Publication number: 20090269862
    Abstract: An alignment method of chips that are formed on a surface of a semiconductor wafer with alignment marks corresponding to the chips includes the steps of irradiating an alignment mark corresponding to a predetermined alignment chip in a predetermined area including the chips with a laser light; detecting reflected waves from the alignment mark of the predetermined alignment chip to obtain a position of the alignment mark of the predetermined alignment chip; irradiating an alignment mark of an alternative chip different from the predetermined alignment chip with the laser light in case of not being able to obtain the position of the alignment mark of the predetermined alignment chip; obtaining a position of the alignment mark of the alternative chip by detecting the reflected waves from the alignment mark of the alternative chip; and aligning the chips in the predetermined area based on positions of alignment marks including the position of the alignment mark of the alternative chip.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 29, 2009
    Inventor: YUKIHIRO TANEMURA
  • Publication number: 20080251950
    Abstract: A disclosed semiconductor device includes a semiconductor substrate including semiconductor integrated circuit forming areas; semiconductor integrated circuits formed on the semiconductor integrated circuit forming areas; and an alignment pattern formed on a periphery of at least one of the semiconductor integrated circuit forming areas.
    Type: Application
    Filed: August 15, 2007
    Publication date: October 16, 2008
    Inventor: Yukihiro TANEMURA