Abstract: A circuit device including: a detection circuit (10) that performs A/D conversion of a first detection voltage (VD1) that is detected by using a thermopile (2), and outputs a first detection value (DT1) that is a digital value, and performs A/D conversion of a second detection voltage (VD2) that is detected by using a thermistor (4), and outputs a second detection value (DT2) that is a digital value; and a control unit (50) that obtains a self-temperature by using the second detection value (DT2), obtains a second electromotive voltage that corresponds to the self-temperature by using the self-temperature, obtains a first electromotive voltage that corresponds to an object's temperature by using the first detection value (DT1) and the second electromotive voltage, and obtains the object's temperature by using the first electromotive voltage.

Abstract: A circuit device including: a detection circuit (10) that performs A/D conversion of a first detection voltage (VD1) that is detected by using a thermopile (2), and outputs a first detection value (DT1) that is a digital value, and performs A/D conversion of a second detection voltage (VD2) that is detected by using a thermistor (4), and outputs a second detection value (DT2) that is a digital value; and a control unit (50) that obtains a self-temperature by using the second detection value (DT2), obtains a second electromotive voltage that corresponds to the self-temperature by using the self-temperature, obtains a first electromotive voltage that corresponds to an object's temperature by using the first detection value (DT1) and the second electromotive voltage, and obtains the object's temperature by using the first electromotive voltage.

Abstract: A data transfer control device includes an OUT-transfer transmitter circuit which transmits OUT data by driving a serial signal line, a clock-transfer transmitter circuit which transmits a clock signal CLK by driving a serial signal line, a PLL circuit which generates the clock signal CLK, and a power-down setting circuit which sets a power-down mode. In a first power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode, and the clock-transfer transmitter circuit is set to the power-down mode to stop a system clock signal of a target-side data transfer control device. In a second power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.

Abstract: A data transfer control device includes: a transmitter circuit; a receiver circuit; a transfer direction switch circuit which performs switching a transfer direction; a transfer direction switch indication circuit which indicates the transfer direction switch circuit to switch the transfer direction; and a code generation circuit which generates a transfer direction switch request code when a transfer direction switch request has been received from an upper layer circuit. When the transfer direction switch request has been received from the upper layer circuit, the transmitter circuit transmits the transfer direction switch request code through a serial signal line, and the transfer direction switch indication circuit indicates the transfer direction switch circuit to switch from a transmission direction to a reception direction after the transfer direction switch request code has been transmitted.

Abstract: A differential amplifier circuit, a differentiation circuit and an output amplifier circuit are provided. The differential amplifier circuit differentially amplifies differentially inputted signals and provides an output. The differentiation circuit differentiates the output of the differential amplifier circuit, and adds the differentiated output to a bias voltage of a constant current transistor of the output amplifier circuit. A voltage comparator capable of higher speed operation without increasing its current consumption is provided.

Abstract: A data transfer control device includes: an encoder circuit which performs encoding data and generation of a special code; a parallel/serial conversion circuit which converts parallel data from the encoder circuit to serial data; and a transmitter circuit which receives the serial data and transmits the special code and the data through the serial signal line. The transmitter circuit outputs an idle signal, logical level of which is continuously fixed at a first logical level in units of a given number of bits or more to the serial signal line as a signal indicating an idle state. The encoder circuit suspends operation after an indication that there is no transmission data by a transmission data valid/invalid signal from an upper layer circuit.

Abstract: A receiver circuit includes: a current/voltage conversion circuit which performs a current/voltage conversion based on current which flows through the differential signal lines and outputs voltage signals; a comparator which compares the voltage signals and outputs an output signal; a power-down detection circuit which, when the transmitter circuit transmits a power-down command by current-driving the differential signal lines in a normal transfer mode, detects the transmitted power-down command based on a comparison result from the comparator; and a power-down setting circuit which sets at least one of the current/voltage conversion circuit and the comparator to a power-down mode when the power-down command is detected.

Abstract: A data transfer control device including: a node to which is input data to be transferred through serial transfer paths; a LINK circuit which splits the input data into first to pth channels in predetermined units in sequence, and outputs the thus-split data and a split transfer notification for each channel; first to pth parallel/serial conversion circuits which convert the split data and the split transfer notification that are output for each channel into a serial signal; and first to pth transceivers which output the serial signal which has been input from the first to pth parallel/serial conversion circuits to the serial transfer paths for the first to pth channels.

Abstract: A flexible substrate including: a first part provided with a first device DV1; a second part provided with a second device; a wiring part placed between the first part and the second part and including a plurality of wirings for coupling the first device and the second device; the first device including at least a first data transfer control unit, the second device including at least a second data transfer control unit, the first data transfer control unit and the second data transfer control unit transferring data by using a differential signal, and the plurality of wirings for coupling the first device and the second device including at least one differential signal line pair for transferring data by using a differential signal.

Abstract: A data transfer control device includes an OUT-transfer transmitter circuit which transmits OUT data by driving a serial signal line, a clock-transfer transmitter circuit which transmits a clock signal CLK by driving a serial signal line, a PLL circuit which generates the clock signal CLK, and a power-down setting circuit which sets a power-down mode. In a first power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode, and the clock-transfer transmitter circuit is set to the power-down mode to stop a system clock signal of a target-side data transfer control device. In a second power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.

Abstract: A transmitter circuit including: a current driver which current-drives differential signal lines; and a voltage driver which is electrically disconnected from at least one of the differential signal lines in a normal transfer mode, and is electrically connected to the at least one of the differential signal lines and voltage-drives the at least one of the differential signal lines in a power-down mode. The voltage driver outputs a power-down voltage for setting a receiver circuit to the power-down mode or a wakeup voltage for canceling the power-down mode of the receiver circuit, to the at least one of the differential signal lines. The current driver transmits a power-down command to the receiver circuit by current-driving the differential signal lines in the normal transfer mode.

Abstract: A transmitter circuit including: a current driver which current-drives differential signal lines; and a voltage driver which is electrically disconnected from at least one of the differential signal lines in a normal transfer mode, and is electrically connected to the at least one of the differential signal lines and voltage-drives the at least one of the differential signal lines in a power-down mode. The voltage driver outputs a power-down voltage for setting a receiver circuit to the power-down mode or a wakeup voltage for canceling the power-down mode of the receiver circuit, to the at least one of the differential signal lines. The current driver transmits a power-down command to the receiver circuit by current-driving the differential signal lines in the normal transfer mode.

Abstract: A data transfer control device includes an OUT-transfer transmitter circuit which transmits OUT data by driving a serial signal line, a clock-transfer transmitter circuit which transmits a clock signal CLK by driving a serial signal line, a PLL circuit which generates the clock signal CLK, and a power-down setting circuit which sets a power-down mode. In a first power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode, and the clock-transfer transmitter circuit is set to the power-down mode to stop a system clock signal of a target-side data transfer control device. In a second power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.

Abstract: A transmitter circuit including: a current driver which current-drives differential signal lines; and a voltage driver which is electrically disconnected from at least one of the differential signal lines in a normal transfer mode, and is electrically connected to the at least one of the differential signal lines and voltage-drives the at least one of the differential signal lines in a power-down mode. The voltage driver outputs a power-down voltage for setting a receiver circuit to the power-down mode or a wakeup voltage for canceling the power-down mode of the receiver circuit, to the at least one of the differential signal lines. The current driver transmits a power-down command to the receiver circuit by current-driving the differential signal lines in the normal transfer mode.

Abstract: A transmitter circuit including: a current driver which current-drives differential signal lines; and a voltage driver which is electrically disconnected from at least one of the differential signal lines in a normal transfer mode, and is electrically connected to the at least one of the differential signal lines and voltage-drives the at least one of the differential signal lines in a power-down mode. The voltage driver outputs a power-down voltage for setting a receiver circuit to the power-down mode or a wakeup voltage for canceling the power-down mode of the receiver circuit, to the at least one of the differential signal lines. The current driver transmits a power-down command to the receiver circuit by current-driving the differential signal lines in the normal transfer mode.

Abstract: A flexible substrate including: a first part provided with a first device DV1; a second part provided with a second device; a wiring part placed between the first part and the second part and including a plurality of wirings for coupling the first device and the second device; the first device including at least a first data transfer control unit, the second device including at least a second data transfer control unit, the first data transfer control unit and the second data transfer control unit transferring data by using a differential signal, and the plurality of wirings for coupling the first device and the second device including at least one differential signal line pair for transferring data by using a differential signal.

Abstract: A data transfer control device includes: an encoder circuit which performs encoding data and generation of a special code; a parallel/serial conversion circuit which converts parallel data from the encoder circuit to serial data; and a transmitter circuit which receives the serial data and transmits the special code and the data through the serial signal line. The transmitter circuit outputs an idle signal, logical level of which is continuously fixed at a first logical level in units of a given number of bits or more to the serial signal line as a signal indicating an idle state. The encoder circuit suspends operation after an indication that there is no transmission data by a transmission data valid/invalid signal from an upper layer circuit.

Abstract: A data transfer control device includes: a transmitter circuit; a receiver circuit; a transfer direction switch circuit which performs switching a transfer direction; a transfer direction switch indication circuit which indicates the transfer direction switch circuit to switch the transfer direction; and a code generation circuit which generates a transfer direction switch request code when a transfer direction switch request has been received from an upper layer circuit. When the transfer direction switch request has been received from the upper layer circuit, the transmitter circuit transmits the transfer direction switch request code through a serial signal line, and the transfer direction switch indication circuit indicates the transfer direction switch circuit to switch from a transmission direction to a reception direction after the transfer direction switch request code has been transmitted.

Abstract: A data transfer control device including: a node to which is input data to be transferred through serial transfer paths; a LINK circuit which splits the input data into first to pth channels in predetermined units in sequence, and outputs the thus-split data and a split transfer notification for each channel; first to pth parallel/serial conversion circuits which convert the split data and the split transfer notification that are output for each channel into a serial signal; and first to pth transceivers which output the serial signal which has been input from the first to pth parallel/serial conversion circuits to the serial transfer paths for the first to pth channels.

Abstract: A receiver circuit includes: a current/voltage conversion circuit which performs a current/voltage conversion based on current which flows through the differential signal lines and outputs voltage signals; a comparator which compares the voltage signals and outputs an output signal; a power-down detection circuit which, when the transmitter circuit transmits a power-down command by current-driving the differential signal lines in a normal transfer mode, detects the transmitted power-down command based on a comparison result from the comparator; and a power-down setting circuit which sets at least one of the current/voltage conversion circuit and the comparator to a power-down mode when the power-down command is detected.