Patents by Inventor Yukinobu Ishigaki

Yukinobu Ishigaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5832027
    Abstract: A spread spectrum modulating and demodulating apparatus which is capable of providing FSK or PSK spread spectrum communications. In a transmitting device an input information signal is fed either to an oscillator or to a side of a power supply which is in turn connected to an operation device. An oscillator produces a carrier frequency signal which multiplied by a multiplier by the predetermined integer N1. A frequency divider divides the frequency of the carrier by a predetermined integer N2. A spread code generator uses an output signal of the frequency divider as a clock signal, and generates a spread code which is fed to the operation device. A switch selectively feeds an input information signal to either the oscillator for frequency shift keying the oscillator or through the side of the power supply connected to the operation device will effect a phase shift key operation.
    Type: Grant
    Filed: February 27, 1996
    Date of Patent: November 3, 1998
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 5767705
    Abstract: A frequency converting circuit has a phase divider, a switching circuit, and switching pulse generator. The phase divider divides a phase of a first input signal and outputting m-units of channel signals having a same frequency but different phases shifted 2.pi./m by 2.pi./m radian respectively, where m is a three or more natural number except 2.sup.n (n: a natural number). The m-units of the channel signals are switched by the switching circuit to output switched channel signals. In response to a second input signal having a frequency higher than that of the first input signal, the switching pulse generator generates switching pulse signals, and switches and outputs the m-units of channel signals having different phases shifted 2.pi./m by 2.pi./m radian for each constant period, by controlling the switching circuit based on the switching pulse signals.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: June 16, 1998
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yutaka Ichinoi, Yukinobu Ishigaki
  • Patent number: 5760622
    Abstract: This invention provides a frequency converting circuit that does not require balance adjustment, can be used in a broad frequency band, and is well-suited to implementation in the form of an integrated circuit. A first input signal undergoes a phase shift into 2.sup.o (where n is a natural number of 2 or greater) respective channel signals, each with a different phase, for output. A second input signal is used to generate switch signals 10 numbered 1 . . . n. The 2.sup.n channel signals are switched according to the first switch signal, reducing the number of channels by 1/2, for output. The output of the (m-1) th switch (where m is a natural number of 2 . . . n) is switched according to the mth switch signal, reducing the number of channels by 1/2 for output, at switch m. This process is repeated continuously from switches 2-n until the signal is output as a single channel signal.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: June 2, 1998
    Assignee: Victor Company of Japan, Ltd
    Inventor: Yukinobu Ishigaki
  • Patent number: 5648736
    Abstract: A frequency converting circuit which requires no balance regulation, is usable in a wide frequency band and is suitable to be incorporated in an integrated circuit. A first input signal is supplied to an input terminal 1 and a phase division circuit 2 to produce two phase divided signals from the first input signal. A second input signal is supplied to an input terminal 4 of a switch signal generating circuit 5 which produces two switch signals from the second input signal. A first one of the two switch signals and the two phase divided signals are supplied to a first switch 3. Switch 3 selectively outputs one of the two phase divided signals responsive to the first one of the two switch signals. Another output of the first switch 3 is a signal obtained by inverting a phase of the one selected output signal of switch 3 by means of the phase invertor/amplifier 6.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: July 15, 1997
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 5539770
    Abstract: A spread spectrum modulating apparatus includes an oscillator outputting a carrier. A frequency multiplier multiplies a frequency of the carrier by a predetermined integer N1. A frequency divider divides the frequency of the carrier by a predetermined integer N2. A spread code generator uses an output signal of the frequency divider as a clock signal, and generates a spread code in response to the clock signal. A power supply feeds a dc bias voltage. An operation device executes a predetermined logic operation between the spread code and the dc bias voltage of the power supply. A switch selectively feeds an input information signal to either the oscillator or the point of connection of the power supply to the operation device, selecting between PSK and FSK as primary modulation. An output signal of the operation device and an output signal of the frequency multiplier are multiplied to execute a spectrum spreading process.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: July 23, 1996
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 5402442
    Abstract: A receiving device for receiving spread spectrum-modulated GPS signal transmitted from GPS (Global Positioning System) satellites to the earth. Received GPS signals are converted into IF signals which are despread-demodulated on the basis of C/A codes, resulting in demodulated PSK signals. Carriers are reproduced from the IF signals and a clock signal for C/A code generator is produced from the reproduced carrier and a local oscillation signal. The PSK signal is demodulated on the basis of a reference frequency of a PLL circuit to obtain a navigation message.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: March 28, 1995
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 5301206
    Abstract: A spread spectrum communication system comprising a transmitter including an angle modulator, a frequency divider, a spread code generator, and a spread spectrum modulator, and a receiver including a despreading circuit, an angle demodulator, a sync detection circuit, and a clock signal generating circuit. In the transmitter, the spread code generator produces a spread code having correlation with the angle-modulated signal outputted from the angle modulator. In the receiver the despreading circuit despreads the spread spectrum modulation signal sent from the transmitter by a demodulation spread code. The angle demodulator generates a demodulation output by means of a phase-locked loop circuit contained therein. The sync detection circuit detects sync condition on the basis of noise level of a phase detector provided in the phase-locked loop circuit, and generates a sync detection signal when sync condition is established.
    Type: Grant
    Filed: February 4, 1993
    Date of Patent: April 5, 1994
    Assignee: Victor Company of Japan, Inc.
    Inventors: Yukinobu Ishigaki, Takahisa Matsumoto
  • Patent number: 5239556
    Abstract: A demodulation system for spread spectrum communication includes a first low pass filter for processing an input spread spectrum signal including a product of an information signal and a first spread code. A second spread code is generated which is equivalent to the first spread code. A second low pass filter processes the second spread code and has a transfer function substantially equal to a transfer function of the first low pass filter. An absolute value circuit derives an absolute value of an output signal from the second low pass filter. A division circuit derives a reciprocal of an output signal from the absolute value circuit. A delay circuit delays the second spread code by a predetermined time. A first multiplier multiplies an output signal from the division circuit and an output signal from the delay circuit, and generates a third spread code in response to the output signals from the division circuit and the delay circuit.
    Type: Grant
    Filed: December 27, 1991
    Date of Patent: August 24, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Takahisa Matsumoto
  • Patent number: 5170411
    Abstract: A modulation and demodulation system for spread spectrum transmission comprises modulation and demodulation sections. The modulation section spreads/modulates an input information signal by multiplying by a PN code to provide a spread spectrum signal. The demodulation section despreads/demodulates the spread spectrum signal including interference mixed therein by substantially using the same spread code.
    Type: Grant
    Filed: September 19, 1991
    Date of Patent: December 8, 1992
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 4977578
    Abstract: A spread spectrum communication system having a modulation unit for modulating and spreading an information signal by one or more of carrier signals and a spread code and transmitting it as a radio wave, and a demodulation unit for despreading and demodulating a received radio wave to pick up the information signal. The modulation unit includes a synthesizing and modulating unit for synthesizing a first primary modulated signal obtained by modulating a first carrier by the information signal and a second primary modulation signal obtained by modulating a second carrier, and a spectrum spreading unit for spreading the synthesized first and second primary modulation signals with a spread code to generate a spread spectrum signal containing first and second spread signal components.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: December 11, 1990
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Kenichi Mizuno
  • Patent number: 4953178
    Abstract: There is disclosed a spread spectrum communication system comprising a modulation unit provided in the transmission side for transmitting a composite spread spectrum signal after modulating an information signal by the first and second carrier, and a demodulation unit in the reception side having an automatic gain control (AGC) function and for demodulating a primary-modulated signal by spread code generated therein or despreading.
    Type: Grant
    Filed: September 18, 1989
    Date of Patent: August 28, 1990
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 4943976
    Abstract: A transmitter of a spread spectrum communication system uses a first carrier, a second carrier, a third carrier, a first spread code, and a second spread code. The third carrier is generated by shifting the phase of the first carrier. The second spread code is generated by delaying the first spread code. The first carrier is modulated with an information signal to generate a primary modulation signal. A composite spread spectrum signal is generated by combining and mixing the primary modulation signal, the second carrier, the third carrier, the first spread code, and the second spread code. In a receiver of the system, a separation filter separates the composite spread spectrum signal into a first component and a second component related to the frequency of the first carrier and the frequency of the second carrier respectively. A signal corresponding to the primary modulation signal is demodulated by processing the first and second components of the composite spread spectrum signal.
    Type: Grant
    Filed: September 13, 1989
    Date of Patent: July 24, 1990
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 4888564
    Abstract: A PLL circuit having a function of a frequency multiplier comprises a phase detector circuit receiving an input signal, for producing an error signal which includes an alternating current component having a relatively high frequency depending on the frequency of a frequency-multiplied signal, a low pass loop filter, a voltage controlled oscillator, and a comparison signal generating circuit for generating N phase comparison signals. The phase detector circuit comprises a phase splitting circuit for generating from the input signal N phase split signals having respectively different N phases and N phase detectors for comparing the phases of the N phase split signals with different phases of the N phase comparison signal respectively.
    Type: Grant
    Filed: November 2, 1988
    Date of Patent: December 19, 1989
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 4790009
    Abstract: A scrambler system comprises in a transmitter part thereof as oscillator circuit for generating a local oscillation signal, a frequency dividing circuit for obtaining a frequency divided signal by frequency-dividing the local oscillation signal by 1/N, a triangular wave signal generating circuit for converting the frequency divided signal into a triangular wave signal and for controlling the oscillation frequency of the oscillator circuit by the triangular wave signal, a multiplying circuit for obtaining a frequency converted audio signal by multiplying the local oscillation signal with an input audio signal which is to be scrambled, a pilot signal generating circuit for generating from the frequency divided signal a pilot signal having a single frequency, and an adding circuit for obtaining a scrambled signal for transmission by adding the pilot signal and the frequency converted audio signal. A key is used for de-scrambling the scrambled signal in a receiver part of the scrambler system.
    Type: Grant
    Filed: October 28, 1985
    Date of Patent: December 6, 1988
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Katsuhiro Onuki, Fumio Kawabata
  • Patent number: 4698693
    Abstract: A rotary head type magnetic recording and reproducing apparatus comprises a circuit for recording and reproducing a signal on and from a magnetic recording medium by rotary heads, a circuit for obtaining a frequency modulated (FM) audio signal by frequency-modulating a carrier by an audio signal which is to be recorded, a circuit for generating a frequency drift detection signal having a constant frequency which does not exist within a frequency range occupied by the FM audio signal, a circuit for obtaining a frequency multiplexed signal by frequency-multiplexing the FM audio signal and the detection signal, a circuit for separating the FM audio signal and the detection signal from the signal reproduced by the rotary heads, a demodulating circuit for obtaining an audio signal by frequency-demodulating the separated FM audio signal, a detecting circuit for frequency-demodulating the separated detection signal and for detecting a frequency drift component, a circuit for forming a frequency drift correction sign
    Type: Grant
    Filed: April 26, 1985
    Date of Patent: October 6, 1987
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Yasuomi Namiki, Hisashige Fujiwara, Kazutoshi Hirohashi
  • Patent number: 4635004
    Abstract: A single-sideband generator comprising a 90-degree phase shifter to which a modulating signal is applied, a modulator, and a switching circuit for alternately switching the delayed and nondelayed modulating signals to the modulator at a rate corresponding to the frequency of a carrier. A frequency divider is provided for halving the frequency of the carrier and applying its output to the modulator to cause it to modulate the divider output with the output of the switching circuit. In a preferred embodiment, the modulator comprises a balanced modulator.
    Type: Grant
    Filed: December 27, 1985
    Date of Patent: January 6, 1987
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Yukinobu Ishigaki
  • Patent number: 4626788
    Abstract: An analog signal which is affected by impulse noise is applied to a timing circuit that generates a sampling pulse in response to a noise impulse introduced in the desired signal. This noise-affected signal is also applied to a holding circuit which passes it in the absence of the sampling pulse and holds it in the presence of the sampling pulse to derive therefrom a modified analog signal. A differentiator generates a signal representative of the time-varying rate of the analog signal. A sampling circuit samples the rate representative signal in response to the sampling pulse and holds the sampled signal for the duration of the sampling pulse to derive therefrom a rectangular pulse, so that the amplitude and polarity of the rectangular pulse represent the gradient and polarity of the noise-affected portion of the signal. The rectangular pulse is integrated linearly at a rate variable as a function of the amplitude of the rectangular pulse to generate a ramp voltage.
    Type: Grant
    Filed: July 21, 1983
    Date of Patent: December 2, 1986
    Assignee: Victor Company of Japan, Limited
    Inventor: Yukinobu Ishigaki
  • Patent number: 4614910
    Abstract: In a quarternary differential PSK demodulator, a QPSK input signal is applied to first and second synchronous detectors to which carriers with a 90-degree phase difference therebetween are respectively applied from a voltage-controlled oscillator. A first double-balanced phase detector multiplies the outputs from the synchronous detectors. A second phase detector squares the output of the second synchronous detector. A third double-balanced phase detector provides multiplication of the outputs of the first and second double-balanced phase detectors to generate an output having four times the frequency of the outputs of the synchronous detectors to cancel the information carried by the input PSK signal. A loop filter converts the output of the third phase detector to a DC phase control signal to be applied to the voltage-controlled oscillator.
    Type: Grant
    Filed: July 22, 1985
    Date of Patent: September 30, 1986
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Yukinobu Ishigaki, Kazutoshi Hirohashi
  • Patent number: 4577161
    Abstract: In a noise reduction circuit, a sampling pulse is generated for opening a switch in time-coincident relationship with a signal portion which is affected by a noise impulse. During tracking modes the signal is passed through the switch to a junction between a capacitor and a noninverting amplifier to charge the capacitor to the level of the signal. During a sampling mode the switch is open to block the signal. A feedback circuit having plural time constant values is connected between the output and input of the amplifier to provide primary and secondary differentiation of the output signal of the amplifier. The feedback circuit is disabled during tracking modes to enable the amplifier to linearly amplify the voltage developed across the capacitor and is enabled during the sampling mode to differentiate the voltage that occurred immediately before the switch is turned off for application to the input of the amplifier for linearly interpolating the noise-affected portion of the signal.
    Type: Grant
    Filed: August 8, 1984
    Date of Patent: March 18, 1986
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Kazutoshi Hirohashi, Yukinobu Ishigaki, Yasuomi Namiki
  • Patent number: 4574390
    Abstract: In a noise reduction circuit for reception of stereophonic FM signals in which the demodulated signal is chopped at twice the pilot frequency for separation between left- and right-channel signals, the demodulated signal is sampled by a first sample-and-hold circuit in response to the output of the noise detector to store that portion of the signal which appeared immediately prior to the occurrence of an impulse noise. The demodulated signal is also sampled by a second sample-and-hold circuit at a frequency twice the pilot frequency to eliminate a noise which might arise due to the chopping of the demodulated signal. A signal is derived from the outputs of the first and second sample-and-hold circuits that indicates the slope ratio of the demodulated signal at the moment that occurred immediately prior to the impulse noise.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: March 4, 1986
    Assignee: Victor Company of Japan, Limited
    Inventors: Kazutoshi Hirohashi, Yukinobu Ishigaki