Abstract: A semiconductor memory device includes a cell substrate, a plurality of gate electrodes sequentially stacked on the cell substrate and extending in a first direction, first and second channel structures extending in a second direction different from the first direction and penetrating the plurality of gate electrodes, and a bit line disposed on the plurality of gate electrodes. The first and second channel structures each include a ferroelectric layer, a channel layer, a gate insulating layer and a back gate electrode, which are sequentially disposed on side walls of the plurality of gate electrodes. The first channel structure and the second channel structure are adjacent to each other in the first direction and share a bit line.

Abstract: A vertical variable resistance memory device includes gate electrodes and a pillar structure. The gate electrodes are spaced apart from one another on a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate. The pillar structure extends in the vertical direction through the gate electrodes on the substrate. The pillar structure includes a vertical gate electrode extending in the vertical direction, a variable resistance pattern disposed on a sidewall of the vertical gate electrode, and a channel disposed on an outer sidewall of the variable resistance pattern. The channel and the vertical gate electrode contact each other.

Abstract: Disclosed are semiconductor memory devices and electronic systems including the same. The semiconductor memory device may include a vertical channel perpendicular to a top surface of a substrate, word lines disposed on a first side of the vertical channel and vertically stacked on the substrate, back-gate electrodes disposed on a second side of the vertical channel and vertically stacked on the substrate, a ferroelectric layer disposed between the word lines and the first side of the vertical channel, a first intermediate insulating layer disposed between the ferroelectric layer and the first side of the vertical channel, and a second intermediate insulating layer disposed between the back-gate electrodes and the second side of the vertical channel.

Abstract: A semiconductor memory device includes a back gate electrode, a gate electrode on the back gate electrode, a channel layer between the gate electrode and the back gate electrode, a gate insulating layer between the channel layer and the gate electrode, and a ferroelectric layer between the back gate electrode and the channel layer.

Abstract: A magnetic memory device includes a loop-type magnetic track having a first part and a second part that are arranged in a counterclockwise direction, a first conductive line on a top surface of the first part, and a second conductive line on a bottom surface of the second part. The magnetic track includes a lower magnetic layer, a spacer layer, and an upper magnetic layer that are sequentially stacked. Each of the first and second conductive lines includes heavy metal. Each of the first and second conductive lines is configured to generate spin-orbit torque caused by current that flows therein. The spin-orbit torque causes magnetic domains in the magnetic track to move in a clockwise direction or in the counterclockwise direction.

Abstract: A semiconductor device includes a source structure, gate electrodes spaced apart from each other and stacked in a first direction, perpendicular to an upper surface of the source structure, and a channel structure extending through the gate electrodes in the first direction, and including a dielectric layer, a charge storage layer, a tunneling layer, a channel layer, and a buried semiconductor layer. The dielectric layer is between the gate electrodes and the charge storage layer. The tunneling layer is between charge storage layer and the channel layer. The channel layer is between the tunneling layer and the buried semiconductor layer. An outer surface of a lower portion of the channel layer is in contact with the source structure, and the dielectric layer includes a ferroelectric material, the channel layer includes an oxide semiconductor material, and the buried semiconductor layer includes silicon (Si).

Abstract: Provided are a hydrogen purification device and a hydrogen purification method whereby hydrogen having a high purity can be purified at a high yield from a starting gas. The hydrogen purification device comprises: a starting gas source that supplies a starting gas, said starting gas containing hydrogen molecules and/or a hydride, to a discharge space; a plasma reactor that defines at least a part of the discharge space; a hydrogen flow channel that is connected to the discharge space; and leads out purified hydrogen from the starting gas source; a hydrogen separation membrane that partitions the discharge space from the hydrogen flow channel defines at least a part of the discharge space by one surface thereof and defines at least a part of the hydrogen flow channel by the other surface thereof; an electrode that is positioned outside the discharge space; and an adsorbent that is filled in the discharge space and adsorbs the starting gas.

Abstract: A vertical variable resistance memory device includes gate electrodes and a pillar structure. The gate electrodes are spaced apart from one another on a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate. The pillar structure extends in the vertical direction through the gate electrodes on the substrate. The pillar structure includes a vertical gate electrode extending in the vertical direction, a variable resistance pattern disposed on a sidewall of the vertical gate electrode, and a channel disposed on an outer sidewall of the variable resistance pattern. The channel and the vertical gate electrode contact each other.

Abstract: A vertical variable resistance memory device includes gate electrodes and a pillar structure. The gate electrodes are spaced apart from one another on a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate. The pillar structure extends in the vertical direction through the gate electrodes on the substrate. The pillar structure includes a vertical gate electrode extending in the vertical direction, a variable resistance pattern disposed on a sidewall of the vertical gate electrode, and a channel disposed on an outer sidewall of the variable resistance pattern. The channel and the vertical gate electrode contact each other.

Abstract: In a non-volatile storage device, a first lower-layer metal wire, a lower plug, a variable resistance element, an upper plug, and a first upper-layer metal wire are formed in that order from below in a storage region, and a second lower-layer metal wire, a first via, a middle-layer metal wire, a second via, and a second upper-layer metal wire are formed in that order from below in a circuit region. The first and second lower-layer metal wires are formed in the same layer, and the first and second upper-layer metal wires are formed on the same layer. Relative to a substrate, the variable resistance element and the middle-layer metal wire have top faces at different heights, bottom faces at different heights, or both top faces and bottom faces at different heights.

Abstract: A vertical variable resistance memory device includes gate electrodes and a pillar structure. The gate electrodes are spaced apart from one another on a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate. The pillar structure extends in the vertical direction through the gate electrodes on the substrate. The pillar structure includes a vertical gate electrode extending in the vertical direction, a variable resistance pattern disposed on a sidewall of the vertical gate electrode, and a channel disposed on an outer sidewall of the variable resistance pattern. The channel and the vertical gate electrode contact each other.

Abstract: Provided are a hydrogen recycle system and a hydrogen recycle method, whereby hydrogen can be purified to high purity at high yield from a gas, said gas being exhausted from a nitride compound production device, and recycled. The hydrogen recycle system comprises an exhaust gas supply path supplying a gas exhausted from a nitride compound production device, a hydrogen recycle means and a hydrogen supply path. The hydrogen recycle means of the hydrogen recycle system is characterized by comprising: a plasma reaction vessel that defines at least a part of a discharge space; a hydrogen separation membrane that divides the discharge space from a hydrogen flow path communicated with the hydrogen supply path, defines at least a part of the discharge space by one surface thereof and also defines at least a part of the hydrogen flow path by the other surface thereof; an electrode that is disposed outside the discharge space; and an adsorbent that is filled in the discharge space and adsorbs the supplied exhaust gas.

Abstract: Provided are a hydrogen purification device and a hydrogen purification method whereby hydrogen having a high purity can be purified at a high yield from a starting gas. The hydrogen purification device comprises: a starting gas source that supplies a starting gas, said starting gas containing hydrogen molecules and/or a hydride, to a discharge space; a plasma reactor that defines at least a part of the discharge space; a hydrogen flow channel that is connected to the discharge space; and leads out purified hydrogen from the starting gas source; a hydrogen separation membrane that partitions the discharge space from the hydrogen flow channel defines at least a part of the discharge space by one surface thereof and defines at least a part of the hydrogen flow channel by the other surface thereof; an electrode that is positioned outside the discharge space; and an adsorbent that is filled in the discharge space and adsorbs the starting gas.

Abstract: The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.

Abstract: The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.

Abstract: The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.

Abstract: A method of manufacturing a semiconductor device includes forming a silicon nitride film having an opening portion on a semiconductor substrate, forming a silicon oxide film on the silicon nitride film and on a side face of the opening portion, performing an etching treatment to the silicon oxide film so that a sidewall is formed on the side face of the opening portion, forming a trench on the semiconductor substrate with use of the sidewall and the silicon nitride film as a mask, and forming an insulating layer in the trench. The step of forming the silicon oxide film includes oxidizing the silicon nitride film with a plasma oxidation method or a radical oxidation method.

Abstract: The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines and an insulating layer that is provided between the first bit lines and in a groove. First faces of the first bit lines are aligned on a first line and second faces of the first bit lines are aligned on a second line. A first face of the insulating layer is disposed at a third line that is a first distance from the first line in a first direction and a second face of the insulating layer is disposed at a fourth line that is a second distance from the second line in a second direction.

Abstract: A nonvolatile memory element including: a first electrode; a second electrode; a variable resistance layer that is between the first electrode and the second electrode and includes, as stacked layers, a first variable resistance layer connected to the first electrode and a second variable resistance layer connected to the second electrode; and a side wall protecting layer that has oxygen barrier properties and covers a side surface of the variable resistance layer. The first variable resistance layer includes a first metal oxide and a third metal oxide formed around the first metal oxide and having an oxygen deficiency lower than that of the first metal oxide, and the second variable resistance layer includes a second metal oxide having an oxygen deficiency lower than that of the first metal oxide.

Abstract: A semiconductor device includes bit lines provided in a semiconductor substrate; an ONO film that is provided along the surface of the semiconductor substrate and is made of a tunnel oxide film, a trap layer, and a top oxide film; and an oxide film that is provided on the surface of the semiconductor substrate in the middle between the bit lines and contacts the side face of the ONO film, in which the film thickness of the oxide film is larger than the sum of the thicknesses of the tunnel oxide film and the top oxide film, and smaller than the thickness of the ONO film.