Patents by Inventor Yukio Kaji

Yukio Kaji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966210
    Abstract: A substrate processing apparatus includes a device management controller including a parts management control part configured to monitor the state of parts constituting the apparatus, a device state monitoring control part configured to monitor integrity of device data obtained from an operation state of the parts constituting the apparatus, and a data matching control part configured to monitor facility data provided from a factory facility to the apparatus. The device management controller is configured to derive information evaluating the operation state of the apparatus based on a plurality of monitoring result data selected from a group consisting of maintenance timing monitoring result data acquired by the parts management control part, device state monitoring result data acquired by the device state monitoring control part, and utility monitoring result data acquired by the data matching control part.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: April 23, 2024
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Kazuhide Asai, Kazuyoshi Yamamoto, Hidemoto Hayashihara, Takayuki Kawagishi, Kayoko Yashiki, Yukio Miyata, Hiroyuki Iwakura, Masanori Okuno, Kenichi Fujimoto, Ryuichi Kaji
  • Patent number: 7447363
    Abstract: After reading a predetermined number of predetermined blocks for each of a plurality of image data, a first image read unit 13 reads out the plurality of image data read in parallel by repeatedly switching the designated order of the plurality of image data. A JPEG compression unit 14 performs image compression on the plurality of image data read out in block units by the first image read unit 13, image-compresses a predetermined number of the blocks for each of the plurality of image data, and then inserts an identifier after the last block of the predetermined number of blocks.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: November 4, 2008
    Assignee: PFU Limited
    Inventors: Tomoya Tanabe, Nobuhisa Yamazaki, Yasushi Takemura, Kunihiko Oumi, Shougou Maki, Satoshi Kubo, Ikuo Murata, Yukio Kaji
  • Publication number: 20050157934
    Abstract: After reading a predetermined number of predetermined blocks for each of a plurality of image data, a first image read unit 13 reads out the plurality of image data read in parallel by repeatedly switching the designated order of the plurality of image data. A JPEG compression unit 14 performs image compression on the plurality of image data read out in block units by the first image read unit 13, image-compresses a predetermined number of the blocks for each of the plurality of image data, and then inserts an identifier after the last block of the predetermined number of blocks.
    Type: Application
    Filed: April 28, 2003
    Publication date: July 21, 2005
    Inventors: Tomoya Tanabe, Nobuhisa Yamazaki, Yasushi Takemura, Kunihiko Oumi, Shougou Maki, Satoshi Kubo, Ikuo Murata, Yukio Kaji
  • Patent number: 6760131
    Abstract: An enhancement and interpolation circuit forms enhanced image data by performing enhancement and interpolation processing on image data. A floating slice circuit obtains a floating slice level for said image data. A binarization and density conversion circuit binarizes enhanced image data using the floating slice level to form binarized image data. In the double-side read mode, simultaneously read image data on the right and reverse sides of a document are transferred at a first rate. In the one-side read mode, image data on the right side of a document is transferred at a second rate that is slower than the first rate by data transfer means. An image discriminating circuit forms an image discriminating instruction for read image data. A white level signal generating circuit forms a new white level signal by subjecting said image data and a current white level signal in accordance with an operation designation instruction corresponding to an image discriminating instruction.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: July 6, 2004
    Assignee: PFU Limited
    Inventor: Yukio Kaji
  • Patent number: 6333795
    Abstract: An image scanner connected to a host computer to transfer data to the host computer in accordance with a predetermined interface includes a first read unit and a second read unit in a double-side read mode to read image data on a right side and a reverse side of a first document, respectively. A third read unit in a one-side read mode reads image data on a right side of a second document. A read control unit controls the first and second read units so that the image data can be read simultaneously and controls the third read unit. A signal processing unit produces the image data on the right and reverse sides of the first or second documents. A data transfer unit transfers the image data on the right and reverse sides of the first document or second document at a predetermined speed in accordance with the predetermined interface.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: December 25, 2001
    Assignee: PFU Limited
    Inventor: Yukio Kaji
  • Publication number: 20010012132
    Abstract: An enhancement and interpolation circuit forms enhanced image data by performing enhancement and interpolation processing on image data. A floating slice circuit obtains a floating slice level for said image data. A binarization and density conversion circuit binarizes enhanced image data using the floating slice level to form binarized image data. In the double-side read mode, simultaneously read image data on the right and reverse sides of a document are transferred at a first rate. In the one-side read mode, image data on the right side of a document is transferred at a second rate that is slower than the first rate by data transfer means. An image discriminating circuit forms an image discriminating instruction for read image data. A white level signal generating circuit forms a new white level signal by subjecting said image data and a current white level signal in accordance with an operation designation instruction corresponding to an image discriminating instruction.
    Type: Application
    Filed: April 6, 2001
    Publication date: August 9, 2001
    Inventor: Yukio Kaji
  • Patent number: 6122077
    Abstract: An enhancement and interpolation circuit forms enhanced image data by performing enhancement and interpolation processing on image data. A floating slice circuit obtains a floating slice level for said image data. A binarization and density conversion circuit binarizes enhanced image data using the floating slice level to form binarized image data. In the double-side read mode, simultaneously read image data on the right and reverse sides of a document are transferred at a first rate. In the one-side read mode, image data on the right side of a document is transferred at a second rate that is slower than the first rate by data transfer means. An image discriminating circuit forms an image discriminating instruction for read image data. A white level signal generating circuit forms a new white level signal by subjecting said image data and a current white level signal in accordance with an operation designation instruction corresponding to an image discriminating instruction.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: September 19, 2000
    Assignee: PFU Limited
    Inventor: Yukio Kaji
  • Patent number: 5915049
    Abstract: A first aspect of the present invention provides a white level setting system for an image scanner. The system compares an analog image signal obtained by scanning an original or a white reference with a predetermined analog white level signal, to provide a digital image signal corresponding to an image on the original, calculates a white level for the next scan line according to the digital image signal, and employs the white level for the next scan line. A second aspect of the present invention provides a binarization system for an image scanner. The system divides read image data into predetermined unit blocks, finds rates of changes in gray levels in each of the blocks, detects edges of the image data according to the rates of changes, determines a slice level for each of the blocks according to the gray levels of the edges, and converts the image data of each of the blocks into binary data according to the slice level.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: June 22, 1999
    Assignees: PFU Limited, Fujitsu Limited
    Inventors: Yukio Kaji, Toshiki Nakajima
  • Patent number: 5786905
    Abstract: In an image scanner having a flat bed type structure and an automatic document feeding type structure, the scanner includes: an image read unit at least including a lamp, a mirror and CCD sensors to read a manuscript which is put on the structure; an image control unit operatively connected to the image read unit to process an image read by the image read unit; a host computer operatively connected to the image control means; and the image control unit including a main printed-circuit board provided for the original functions of the image scanner, a main connector connecting the image control means to the host computer, a user printed-circuit board selectively provided by a user as an extended slot and the board being mounted within the image control unit, and a user connector connecting the main printed-circuit board to the user printed-circuit board.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: July 28, 1998
    Assignees: PFU Limited, Fujitsu Limited
    Inventors: Yukio Kaji, Norio Kanemitsu, Mikio Murosaki
  • Patent number: 5673124
    Abstract: In an image scanner having a flat bed type structure and an automatic document feeding type structure, the scanner includes: an image read unit at least including a lamp, a mirror and CCD sensors to read a manuscript which is put on the structure; an image control unit operatively connected to the image read unit to process an image read by the image read unit; a host computer operatively connected to the image control means; and the image control unit including a main printed-circuit board provided for the original functions of the image scanner, a main connector connecting the image control means to the host computer, a user printed-circuit board selectively provided by a user as an extended slot and the board being mounted within the image control unit, and a user connector connecting the main printed-circuit board to the user printed-circuit board.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: September 30, 1997
    Assignees: PFU Limited, Fujitsu Limited
    Inventors: Yukio Kaji, Norio Kanemitsu, Mikio Murosaki
  • Patent number: 5625718
    Abstract: The present invention provides a white level setting system for an image scanner. The system compares an analog image signal obtained by scanning an original or a white reference with a predetermined analog white level signal, to provide a digital image signal corresponding to an image on the original, calculates a white level for the next scan line according to the digital image signal, and employs the white level for the next scan line.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: April 29, 1997
    Assignees: PFU Limited, Fujitsu Limited
    Inventors: Yukio Kaji, Toshiki Nakajima