Patents by Inventor Yukio Tsunetsugu
Yukio Tsunetsugu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145456Abstract: According to one embodiment, a semiconductor device includes: a first insulating element and a second insulating element each controlled based on a control signal; a first control circuit configured to control selection of one of the first insulating element and the second insulating element based on the control signal; a first switch element; a second switch element; a second control circuit configured to control the first switch element based on an output of the first insulating element; and a third control circuit configured to control the second switch element based on an output of the second insulating element.Type: ApplicationFiled: August 29, 2023Publication date: May 2, 2024Inventors: Yuichiro NIIKURA, Yukio TSUNETSUGU, Hitoshi IMAI
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Publication number: 20240113706Abstract: According to the present embodiment, a semiconductor switch includes a switching transistor, a transmission element, a receiving element, and a power supply circuit. The switching transistor is connected between a pair of output terminals. An input signal is input to the transmission element. The receiving element is configured to generate a first current based on input of an input signal to the transmission element, wherein the receiving element is isolated from the transmission element. The power supply circuit is configured to supply a power supply current to a control electrode of the switching transistor in response to generation of the first current.Type: ApplicationFiled: August 25, 2023Publication date: April 4, 2024Inventor: Yukio TSUNETSUGU
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Publication number: 20210067156Abstract: A gate driver circuitry includes a first driver circuitry including an n-type first transistor, a p-type second transistor, a level-up circuitry, and a level-down circuitry. The second transistor has a drain connected to a drain of the first transistor, and operates at a reference voltage higher than that of the first transistor. The level-up circuitry shifts a voltage applied to the gate of the first transistor to a high-level voltage, and makes the voltage to be fed back to the gate of the second transistor. The level-down circuitry shifts a voltage applied to the gate of the second transistor to a low-level voltage, and makes the voltage to be fed back to the gate of the first transistor. The first driver circuitry outputs a drive voltage of a first power transistor from the drains of the first transistor and the second transistor.Type: ApplicationFiled: February 7, 2020Publication date: March 4, 2021Inventor: Yukio Tsunetsugu
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Patent number: 10763851Abstract: A gate control circuit has a first gate controller that controls a gate voltage of a first transistor connected between a first reference voltage node and an output node on the basis of a potential difference between the first reference voltage node and a second reference voltage node, a second gate controller that controls a gate voltage of a second transistor connected between the output node and a fourth reference voltage node. and a voltage adjustment circuit that temporarily increases the potential difference between the first reference voltage node and the second reference voltage node in a first period in which the voltage of the first reference voltage node is rising from an initial voltage and a second period in which the voltage of the first reference voltage node is falling from a normal voltage.Type: GrantFiled: September 3, 2019Date of Patent: September 1, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Yukio Tsunetsugu
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Publication number: 20200220539Abstract: A gate control circuit has a first gate controller that controls a gate voltage of a first transistor connected between a first reference voltage node and an output node on the basis of a potential difference between the first reference voltage node and a second reference voltage node, a second gate controller that controls a gate voltage of a second transistor connected between the output node and a fourth reference voltage node. and a voltage adjustment circuit that temporarily increases the potential difference between the first reference voltage node and the second reference voltage node in a first period in which the voltage of the first reference voltage node is rising from an initial voltage and a second period in which the voltage of the first reference voltage node is falling from a normal voltage.Type: ApplicationFiled: September 3, 2019Publication date: July 9, 2020Inventor: Yukio Tsunetsugu
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Patent number: 10666052Abstract: In one embodiment, a transistor driver includes a first line as a power supply line configured to supply a first voltage, a second line as a power supply line configured to supply a second voltage, and a first controlling transistor provided between the first line and the second line and configured to control a gate voltage of a first transistor to be driven. The driver further includes a third line configured to supply a third voltage that controls a gate voltage of the first controlling transistor, and a power supply circuit connected to the first, second and third lines and configured to vary the third voltage. The driver further includes a depletion P-type transistor including a gate connected to the first line, a drain connected to the second line, and a source connected to the third line.Type: GrantFiled: February 23, 2018Date of Patent: May 26, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Yukio Tsunetsugu
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Publication number: 20190044338Abstract: In one embodiment, a transistor driver includes a first line as a power supply line configured to supply a first voltage, a second line as a power supply line configured to supply a second voltage, and a first controlling transistor provided between the first line and the second line and configured to control a gate voltage of a first transistor to be driven. The driver further includes a third line configured to supply a third voltage that controls a gate voltage of the first controlling transistor, and a power supply circuit connected to the first, second and third lines and configured to vary the third voltage. The driver further includes a depletion P-type transistor including a gate connected to the first line, a drain connected to the second line, and a source connected to the third line.Type: ApplicationFiled: February 23, 2018Publication date: February 7, 2019Inventor: Yukio Tsunetsugu
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Patent number: 9837969Abstract: According to one embodiment, a transimpedance circuit includes: a transimpedance amplifier that converts a current signal into a voltage signal, a reference voltage generating circuit that generates a reference voltage signal, and a comparator that generates a pulse signal corresponding to the current signal in accordance with a voltage level of the voltage signal and a voltage level of the reference voltage signal. The transimpedance amplifier includes a first transistor that amplifies the current signal, a voltage converter that converts the current signal into a voltage signal, and a bypass circuit that allows the current signal to be bypassed when the current signal which flows through a control terminal of the first transistor exceeds a predetermined value.Type: GrantFiled: August 5, 2015Date of Patent: December 5, 2017Assignee: Kabushiki Kaisha ToshibaInventor: Yukio Tsunetsugu
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Patent number: 9768765Abstract: A gate control circuit includes a first pulse generator that outputs a first pulse signal when an input signal changes from a first logical level to a second logical level, a first gate controlling portion that controls a gate voltage of a first transistor based on a first control signal when the input signal is at the second logical level, a second pulse generator that outputs a second pulse signal when the input signal changes from the second logical level to the first logical level, and a second gate controlling portion that controls the gate voltage of the first transistor based on a second control signal when the input signal is at the first logical level. The first gate controlling portion includes a first overcurrent controlling portion that controls a voltage level of the first control signal after an expiration of an output period of the first pulse signal.Type: GrantFiled: August 29, 2016Date of Patent: September 19, 2017Assignee: Kabushiki Kaisha ToshibaInventor: Yukio Tsunetsugu
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Publication number: 20170222637Abstract: A gate control circuit includes a first pulse generator that outputs a first pulse signal when an input signal changes from a first logical level to a second logical level, a first gate controlling portion that controls a gate voltage of a first transistor based on a first control signal when the input signal is at the second logical level, a second pulse generator that outputs a second pulse signal when the input signal changes from the second logical level to the first logical level, and a second gate controlling portion that controls the gate voltage of the first transistor based on a second control signal when the input signal is at the first logical level. The first gate controlling portion includes a first overcurrent controlling portion that controls a voltage level of the first control signal after an expiration of an output period of the first pulse signal.Type: ApplicationFiled: August 29, 2016Publication date: August 3, 2017Inventor: Yukio TSUNETSUGU
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Publication number: 20160268975Abstract: According to one embodiment, a transimpedance circuit includes: a transimpedance amplifier that converts a current signal into a voltage signal, a reference voltage generating circuit that generates a reference voltage signal, and a comparator that generates a pulse signal corresponding to the current signal in accordance with a voltage level of the voltage signal and a voltage level of the reference voltage signal. The transimpedance amplifier includes a first transistor that amplifies the current signal, a voltage converter that converts the current signal into a voltage signal, and a bypass circuit that allows the current signal to be bypassed when the current signal which flows through a control terminal of the first transistor exceeds a predetermined value.Type: ApplicationFiled: August 5, 2015Publication date: September 15, 2016Inventor: Yukio TSUNETSUGU
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Publication number: 20160073466Abstract: An output circuit for receiving an input signal and outputting an output signal is provided. The output circuit includes an input terminal, an output terminal, a power supply terminal, a reference potential terminal, an output unit, a first drive circuit, and a second drive circuit. The output unit includes a first transistor, a first capacitance element, a second transistor, and a second capacitance element. The first transistor is connected between the power supply terminal and the output terminal. The first capacitance element is connected between a gate and the drain of the first transistor. The second transistor is connected between the reference potential terminal and output terminal. The second capacitance element is connected between a gate and the drain of the second transistor. The first and second drive circuits are configured to drive the first and second transistor respectively based on a voltage at the gate of the other transistor.Type: ApplicationFiled: February 27, 2015Publication date: March 10, 2016Inventor: Yukio TSUNETSUGU
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Publication number: 20150365060Abstract: A transimpedance amplifier includes a first current source, a second current source, an output amplifier, and a bias circuit. The first current source includes a first cascode circuit with two transistors. The second current source includes a second cascode circuit with two transistors. The output amplifier includes a first input terminal to which an output of the first cascode circuit is input and a first output terminal at which an output voltage corresponding to a photocurrent is output. The bias circuit is connected between the first and second current sources. The photocurrent at a phototerminal corresponds to a first current from the first current source subtracted from a sum of a second current from the second current source and a first feedback current from the output amplifier.Type: ApplicationFiled: February 27, 2015Publication date: December 17, 2015Inventor: Yukio TSUNETSUGU
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Patent number: 8803116Abstract: According to a receiving circuit includes a light receiving element, a signal voltage generation portion, a comparator, a reference voltage generation portion and a switch. The light receiving element receives a light signal and outputs a light current corresponding to the light signal. The signal voltage generation portion converts the light current into a signal voltage and outputs the signal voltage. The comparator compares the signal voltage with a first threshold value or a second threshold value. The reference voltage generation portion outputs a reference voltage input to the comparator. The switch changes the reference voltage to one of the first threshold value and the second threshold value based on an output of the comparator.Type: GrantFiled: March 5, 2012Date of Patent: August 12, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Yukio Tsunetsugu
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Publication number: 20130181771Abstract: According to one embodiment, a light receiving circuit includes a light receiving element, an amplifier, and a first compensator. The light receiving element is configured to output an optical current by receiving an optical signal. The amplifier is configured to convert the optical current into a voltage and amplify the voltage. The first compensator is connected to the amplifier and configured to suppress a variation in an opposite direction from a voltage variation of the amplifier when the optical current increases.Type: ApplicationFiled: August 27, 2012Publication date: July 18, 2013Applicant: Kabushiki Kaisha ToshibaInventor: Yukio TSUNETSUGU
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Publication number: 20120256081Abstract: According to a receiving circuit includes a light receiving element, a signal voltage generation portion, a comparator, a reference voltage generation portion and a switch. The light receiving element receives a light signal and outputs a light current corresponding to the light signal. The signal voltage generation portion converts the light current into a signal voltage and outputs the signal voltage. The comparator compares the signal voltage with a first threshold value or a second threshold value. The reference voltage generation portion outputs a reference voltage input to the comparator. The switch changes the reference voltage to one of the first threshold value and the second threshold value based on an output of the comparator.Type: ApplicationFiled: March 5, 2012Publication date: October 11, 2012Applicant: Kabushiki Kaisha ToshibaInventor: Yukio TSUNETSUGU
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Publication number: 20110298528Abstract: According to one embodiment, a power semiconductor system includes; a first power semiconductor element, a driver IC, a first temperature detection element, a control circuit and an overheat protection control section. The first power semiconductor element controls current flowing between a first electrode and a second electrode with a control electrode. The driver IC supplies a drive signal making the first power semiconductor element on and off. The first temperature detection element detects a temperature of the driver IC. The control circuit supplies a control signal for controlling operation of the driver IC to the driver IC. The overheat protection control section is configured to supply an overheat protection signal to the control circuit based on an output of the first temperature detection element. The control circuit performs overheat protection operation. The overheat protection control section supplies the overheat protection signal to the control circuit.Type: ApplicationFiled: March 21, 2011Publication date: December 8, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Koichi Endo, Yukio Tsunetsugu, Kazutoshi Nakamura
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Patent number: 5646514Abstract: An AC/DC converter includes a rectifying circuit, a main switching device constituted by an N-channel IGBT or an N-channel FET, a control circuit, a booster circuit, and a series power supply circuit. The rectifying circuit rectifies a half wave of an input AC voltage. One end of the current path of the main switching device is supplied with a half-wave rectifying output from the rectifying circuit. The control circuit turns on the main switching device when a voltage between the gate and the other end of the main switching device exceeds a first level, and turns off the main switching device when the voltage exceeds a second level which is higher than the first level. The booster circuit boosts the voltage between the gate and the other end of the main switching device to a level which is higher than the second level when the voltage exceeds the first level.Type: GrantFiled: October 13, 1994Date of Patent: July 8, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Yukio Tsunetsugu