Patents by Inventor Yukiyasu Sugano

Yukiyasu Sugano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6933185
    Abstract: The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 23, 2005
    Assignee: Sony Corporation
    Inventors: Hiroyuki Wada, Yoshimi Hirata, Ayumu Taguchi, Koichi Tatsuki, Nobuhiko Umezu, Shigeo Kubota, Tetsuo Abe, Akifumi Ooshima, Tadashi Hattori, Makoto Takatoku, Yukiyasu Sugano
  • Patent number: 6693258
    Abstract: A polycrystalline thin film of good quality is obtained by improving a crystallization process of a semiconductor thin film using laser light. After conducting a film forming step of forming a non-single crystal semiconductor thin film on a surface of a substrate, an annealing step is conducted by irradiating with laser light to convert the non-single crystal semiconductor thin film to a polycrystalline material. The annealing step is conducted by changing and adjusting the cross sectional shape of the laser light to a prescribed region. The semiconductor thin film is irradiated once or more with a pulse of laser light having an emission time width from upstand to downfall of 50 ns or more and having a constant cross sectional area, so as to convert the semiconductor thin film contained in an irradiated region corresponding to the cross sectional area to a polycrystalline material at a time. At this time, the energy intensity of laser light from upstand to downfall is controlled to apply a desired change.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: February 17, 2004
    Assignee: Sony Corporation
    Inventors: Yukiyasu Sugano, Masahiro Fujino, Michio Mano, Akihiko Asano, Masumitsu Ino, Takenobu Urazono, Makoto Takatoku
  • Patent number: 6646711
    Abstract: The weight and thickness reduction of a display panel can be realized without reducing the substrate size and lowering the productivity. To produce a display panel, there are performed a panel producing step for manufacturing a display panel using substrates each having a predetermined wall thickness; and a chemical treatment step for immersing the display panel into a chemical solution and removing a fixed amount of the surface of the substrates by a chemical reaction so as to reduce the wall thickness, wherein in the panel producing step, the display panel is produced by forming an electroluminescence element on one substrate having a predetermined thickness, and in the chemical treatment step, the display panel is immersed into the chemical solution while the electroluminescence element is protected.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: November 11, 2003
    Assignee: Sony Corporation
    Inventor: Yukiyasu Sugano
  • Patent number: 6632711
    Abstract: A polycrystalline thin film of good quality is obtained by improving a crystallization process of a semiconductor thin film using laser light. After conducting a film forming step of forming a non-single crystal semiconductor thin film on a surface of a substrate, an annealing step is conducted by irradiating with laser light to convert the non-single crystal semiconductor thin film to a polycrystalline material. The annealing step is conducted by changing and adjusting the cross sectional shape of the laser light to a prescribed region. The semiconductor thin film is irradiated once or more with a pulse of laser light having an emission time width from upstand to downfall of 50 ns or more and having a constant cross sectional area, so as to convert the semiconductor thin film contained in an irradiated region corresponding to the cross sectional area to a polycrystalline material at a time. At this time, the energy intensity of laser light from upstand to downfall is controlled to apply a desired change.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: October 14, 2003
    Assignee: Sony Corporation
    Inventors: Yukiyasu Sugano, Masahiro Fujino, Michio Mano, Akihiko Asano, Masumitsu Ino, Takenobu Urazono, Makoto Takatoku
  • Publication number: 20030183853
    Abstract: The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.
    Type: Application
    Filed: March 24, 2003
    Publication date: October 2, 2003
    Inventors: Hiroyuki Wada, Yoshimi Hirata, Ayumu Taguchi, Koichi Tatsuki, Nobuhiko Umezu, Shigeo Kubota, Tetsuo Abe, Akifumi Ooshima, Tadashi Hattori, Makoto Takatoku, Yukiyasu Sugano
  • Publication number: 20020096680
    Abstract: A polycrystalline thin film of good quality is obtained by improving a crystallization process of a semiconductor thin film using laser light. After conducting a film forming step of forming a non-single crystal semiconductor thin film on a surface of a substrate, an annealing step is conducted by irradiating with laser light to convert the non-single crystal semiconductor thin film to a polycrystalline material. The annealing step is conducted by changing and adjusting the cross sectional shape of the laser light to a prescribed region. The semiconductor thin film is irradiated once or more with a pulse of laser light having an emission time width from upstand to downfall of 50 ns or more and having a constant cross sectional area, so as to convert the semiconductor thin film contained in an irradiated region corresponding to the cross sectional area to a polycrystalline material at a time. At this time, the energy intensity of laser light from upstand to downfall is controlled to apply a desired change.
    Type: Application
    Filed: February 4, 2002
    Publication date: July 25, 2002
    Inventors: Yukiyasu Sugano, Masahiro Fujino, Michio Mano, Akihiko Asano, Masumitsu Ino, Takenobu Urazono, Makoto Takatoku
  • Publication number: 20020067459
    Abstract: The weight and thickness reduction of a display panel can be realized without reducing the substrate size and lowering the productivity. To produce a display panel, there are performed a panel producing step for manufacturing a display panel using substrates each having a predetermined wall thickness; and a chemical treatment step for immersing the display panel into a chemical solution and removing a fixed amount of the surface of the substrates by a chemical reaction so as to reduce the wall thickness. In the chemical treatment step, the temperature change of the chemical solution is controlled so as to be within the range from a predetermined temperature to ±5° C., thereby removing a fixed amount of the surface of the substrates. In this case, a predetermined temperature of the chemical solution is between 30° C. and 60° C.
    Type: Application
    Filed: September 13, 2001
    Publication date: June 6, 2002
    Inventor: Yukiyasu Sugano
  • Publication number: 20010038105
    Abstract: The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.
    Type: Application
    Filed: January 8, 2001
    Publication date: November 8, 2001
    Inventors: Hiroyuki Wada, Yoshimi Hirata, Ayumu Taguchi, Koichi Tatsuki, Nobuhiko Umezu, Shigeo Kubota, Tetsuo Abe, Akifumi Ooshima, Tadashi Hattori, Makoto Takatoku, Yukiyasu Sugano
  • Publication number: 20010000243
    Abstract: A polycrystalline thin film of good quality is obtained by improving a crystallization process of a semiconductor thin film using laser light. After conducting a film forming step of forming a non-single crystal semiconductor thin film on a surface of a substrate, an annealing step is conducted by irradiating with laser light to convert the non-single crystal semiconductor thin film to a polycrystalline material. The annealing step is conducted by changing and adjusting the cross sectional shape of the laser light to a prescribed region. The semiconductor thin film is irradiated once or more with a pulse of laser light having an emission time width from upstand to downfall of 50 ns or more and having a constant cross sectional area, so as to convert the semiconductor thin film contained in an irradiated region corresponding to the cross sectional area to a polycrystalline material at a time. At this time, the energy intensity of laser light from upstand to downfall is controlled to apply a desired change.
    Type: Application
    Filed: December 8, 2000
    Publication date: April 12, 2001
    Inventors: Yukiyasu Sugano, Masahiro Fujino, Michio Mano, Akihiko Asano, Masumitsu Ino, Takenobu Urazono, Makoto Takatoku
  • Patent number: 5972786
    Abstract: A process for forming wiring over a migration preventing layer on a semiconductor substrate including forming a contact hole in a an insulation layer of the substrate and then filling the contact hole with an aluminum based alloy. A migration preventing layer is then formed, of a material which resists migration of atoms of the aluminum based alloy, over the surface of the aluminum based alloy. A wiring layer of aluminum is then formed over the migration preventing layer. In another embodiment, the contact hole may be provided with a first layer to prevent electron migration and a second layer which is a nitride of the first layer material.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 26, 1999
    Assignee: Sony Corporation
    Inventors: Kazuhiro Hoshino, Yukiyasu Sugano
  • Patent number: 5795825
    Abstract: A method of forming a connection layer by filling an Al-based material wherein planarization of an entire surface of a substrate is achieved. 1 Al-based material 10 is deposited and filled in concave sections 4,8 formed in a substrate 1 under a high temperature, and then the surface of the Al-base material is polished with unwoven cloth or an etching liquid. 2 In a lithography process using an alignment mark for alignment on a substrate, an Al-based material is deposited and filled in a concave section in a portion other than the alignment mark for alignment under a high temperature, and then the surface of the Al-based material is polished. 3 In a process to deposit an Al-based material on a substrate and then planarize the surface of the Al-based material by polishing, an antireflection film is deposited on the Al-based material after the Al-based material is planarized.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: August 18, 1998
    Assignee: Sony Corporation
    Inventors: Yukiyasu Sugano, Junichi Sato
  • Patent number: 5776830
    Abstract: The present invention provides a process for fabricating a connection structure comprising a anti-reaction layer having excellent barrier properties and having improved ohmic characteristics with respect to the semiconductor substrate. Accordingly, the present invention comprises forming a first anti-reaction layer by temporarily ceasing the film deposition, and then initiating the film deposition again to form a second anti-reaction layer on the surface of the previously deposited first anti-reaction layer. A heat treatment can be applied to the structure after depositing a anti-reaction layer.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: July 7, 1998
    Assignee: Sony Corporation
    Inventors: Hirofumi Sumi, Keiichi Maeda, Yukiyasu Sugano, Kazuhide Koyama, Mitsuru Taguchi, Kazuhiro Hoshino
  • Patent number: 5397744
    Abstract: A metallization method in which a fine interconnection hole is filled with an Al-based material and in which low resistance and excellent barrier properties may be achieved simultaneously, is proposed. The present invention resides in improvement in the barrier metal structure. (a) A stack of a TiSi.sub.2 layer and a Ti layer, formed by an modified SALICIDE method, and (b) a layer of a Ti-based material rendered amorphous are used. The TiSi.sub.2 layer is formed in a self-aligned manner by reacting the silicon substrate with the Ti layer by the interposition of e.g. a thin SiO.sub.2 layer and exhibits lower sheet resistance and dense film properties as well as excellent barriering properties. The Ti layer is stacked on the TiSi.sub.2 layer for improving wettability with respect to the layer of the Al-based material. The layer of the amorphous Ti-based material is formed by N.sub.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: March 14, 1995
    Assignee: Sony Corporation
    Inventors: Hirofumi Sumi, Yukiyasu Sugano
  • Patent number: 5393398
    Abstract: A magnetron sputtering apparatus comprises: a wafer holder for holding a wafer thereon; a target holder for holding a target thereon, disposed opposite to the wafer holder; and a particle interceptor for intercepting some of particles ejected from the target, disposed between the wafer holder and the target holder. The diameter of the target is not less than that of the wafer and not greater than a value 1.4 times that of the wafer. Most particles fall on the surface of the wafer at small incidence angles and only few particles impinge and accumulate on the particle interceptor, so that particles deposit in a film of a uniform thickness over the surface of the wafer and are able to fall on the bottom surfaces of contact holes formed in the wafer. In a modification, the particle interceptor is moved in a plane parallel to the surface of the wafer to distribute particles uniformly over the surface of the wafer.
    Type: Grant
    Filed: January 7, 1994
    Date of Patent: February 28, 1995
    Assignee: Sony Corporation
    Inventor: Yukiyasu Sugano
  • Patent number: 5290731
    Abstract: A metallization method for improving wettability and reactivity of a titanium (Ti) based barrier metal layer with respect to an aluminum (Al) based material and simultaneously achieving high barrier properties and superior step coverage, is proposed. An operation of increasing the crystal grain size of and planarizing at least a surface region of a barrier metal layer is effected simultaneously at the time of formation of a barrier metal layer. In this manner, Al migration characteristics and reactivity on a barrier metal surface are improved so that voids are not produced when an Al-based material layer is charged into small-sized connecting hole by a process sensitive to surface morphology, such as high temperature bias sputtering. By this technique, wettability of a material layer having distinctly inferior wettability with Al, while being excellent in barrier properties, such as a TiON layer, may be improved. As a smoothing operation, bias sputtering, laser irradiation and lamp annealing are proposed.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: March 1, 1994
    Assignee: Sony Corporation
    Inventors: Yukiyasu Sugano, Shinji Minegishi, Kazuhide Koyama, Hirofumi Sumi
  • Patent number: 5283206
    Abstract: A method of removing Ge particles precipitated in an Al/Ge alloy film formed over the surface of a substrate in fabricating a semiconductor device forms a Cu film over the surface of the Al/Ge alloy film in a laminate structure, subjects the laminate structure to heat treatment to make the Ge particles migrate toward the Cu film and to make the Ge particles and the Cu film interact to produce a Ge/Cu compound layer. Thus, the Ge particles precipitated in the Al/Ge alloy film are removed from the Al/Ge alloy film and, consequently, the contact resistance of the Al/Ge alloy film is reduced and the migration resistance of the Al/Ge alloy film is enhanced.
    Type: Grant
    Filed: June 4, 1992
    Date of Patent: February 1, 1994
    Assignee: Sony Corporation
    Inventor: Yukiyasu Sugano