Abstract: Provided is a method of operating a terminal. The method includes determining a profile item applicable to the profile view for the account based on an input received by the terminal and a coordinate indicating a position where the profile item is provided on the profile view. The method includes displaying the profile item on a screen of the terminal based on the determined profile item and the determined coordinate. The method includes receiving an input related to the profile item, and displaying a visual effect corresponding to the input on the screen.

Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.

Abstract: A tool set includes a tool holder, a tool and a tool rack. The tool has a groove unit. The tool holder has a latch unit that engages the groove unit. The tool rack includes a rack body and a blocking member. When the tool holder is moved away from the rack body after the tool is moved into the rack body by the tool holder and after the blocking member moves to a blocking position, the tool is blocked by the blocking member so that the latch unit is separated from the groove unit and that the tool holder is separated from the tool.

Abstract: A system and a method include a control unit for determining a probable de-icing status for one or more aircraft scheduled to depart from one or more airports. The control unit is configured to determine the probable de-icing status based on a current date at the one or more airports, current weather at the one or more airports, and the actual de-icing status of a plurality of prior aircraft scheduled to depart from the one or more airports before the one or more aircraft.

Abstract: A method (480, 580) of depositing layers of a thin-film transistor on a substrate using a sputter deposition source comprising at least one first pair of electrodes and at least one second pair of electrodes, the method comprising moving (482, 582) the substrate to a first vacuum chamber; depositing (484, 584) a first layer of the layers on the substrate by supplying the at least one first pair of electrodes with bipolar pulsed DC voltage, wherein a first material of the first layer comprises a first metal oxide; moving (486, 586) the substrate from the first vacuum chamber to a second vacuum chamber without a vacuum break; and depositing (488, 588) a second layer of the layers on the first layer by supplying the at least one second pair of electrodes with bipolar pulsed DC voltage, wherein a second material of the second layer comprises a second metal oxide, the second material being different from the first material.

Abstract: A secondary battery and an electrochemical device are provided. The secondary battery includes a positive electrode plate, a separator, an electrolyte solution, and a negative electrode plate. The negative electrode plate includes a negative electrode current collector, and a negative electrode active material layer disposed on the negative electrode current collector. Non-faradaic electric quantity Q C of the negative electrode plate satisfies: 0.05?Q?2.5, wherein Q=Cdl×?U, Cdl nF is non-faradaic capacitance of the negative electrode plate, and ?U V is potential interval of the negative electrode active material layer.

Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes first semiconductor die, a second semiconductor die and a memory package. The first semiconductor die and the second semiconductor die are stacked on each other. The first semiconductor die includes a first interface and a third interface. The first interface overlaps and is electrically connected to the second interface arranged on the second semiconductor die. The third interface is arranged on a first edge of the first semiconductor die. The memory package is disposed beside the first semiconductor die, wherein the memory package is electrically connected to the first semiconductor die by the third interface.

Abstract: A cell penetrating peptide (CPP) according to the present invention is a novel cationic cell penetrating peptide that can effectively transport a biologically active molecule by passing through a cell membrane even when a biologically active molecule is bound thereto, and compared with conventional CPPs, it has excellent cell permeability enabling the transport of a biologically active molecule into cells, and the delivered biologically active molecule may effectively maintain its activity in cells. Accordingly, the CPP of the present invention may be very useful in various fields including cosmetics, diagnostics, drug delivery systems, recombinant protein vaccines, DNA/RNA therapeutics, and gene and protein therapy.

Abstract: A method of forming a TFT is provided including forming a buffer layer over a substrate. A metal oxide channel layer is formed over the buffer layer and the channel layer is annealed. A gate insulator layer is formed over the channel layer and an ILD is deposited over the gate insulator layer to form the TFT. The TFT is annealed for a first annealing condition to form an annealed TFT. The annealed TFT is shorted or includes a first threshold voltage of about 0 volt or less. The annealed TFT is annealed for a second annealing condition to form a regenerated TFT having a second threshold voltage greater than the first threshold voltage, the second annealing condition includes a temperature of about 150° C. to about 275° C.

Abstract: A routing pattern is provided. The routing pattern includes a first routing region, a second routing region and an interconnection region. The first routing region includes a plurality of first conductive lines extending along a first direction. The plurality of first conductive lines has a first pitch along a second direction perpendicular to the first direction. The second routing region includes a plurality of second conductive lines extending along the first direction. The plurality of second conductive lines has a second pitch along the second direction, and the second pitch is approximately equal to the first pitch. The interconnection region includes two body parts and a connecting part connecting to the body parts. The body parts are disposed separately along the first direction. A width of the connecting part along the second direction is smaller than a width of the body parts along the second direction.

Abstract: A transistor device includes a channel region, a first source/drain region adjacent to a first end of the channel region and a second source/drain region adjacent to a second end of the channel region, a gate structure disposed on the channel region, the first source/drain region and the second source/drain region, and an interlayer dielectric (ILD) structure disposed on the gate structure. The ILD structure includes a first dielectric layer including a first set of sublayers. The first set of sublayers includes a first sublayer including a first dielectric material having a first hydrogen concentration and a second sublayer including the first dielectric material having a second hydrogen concentration lower than the first hydrogen concentration. The ILD structure further includes a second dielectric layer including a second set of sublayers. The second set of sublayers includes a third sublayer including a second dielectric material different from the first dielectric material.

Abstract: In an example, a computing device includes a non-volatile storage device to store a basic input/output system (BIOS) variable. Further, the computing device includes a BIOS. During a boot process of the computing devices, the BIOS may read the BIOS variable from the non-volatile storage device. Further, the BIOS may detect that an application is to be deployed in the computing device based on the BIOS variable. Furthermore, the BIOS may load an application package from the non-volatile storage device into a volatile storage device and build an advanced configuration and power interface (ACPI) data structure with the application package loaded in the volatile storage device. Further, the BIOS may deploy the application using the ACPI data structure.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.

Abstract: A semiconductor chip includes a first wireless communication circuit, a second wireless communication circuit, and an auxiliary path. The first wireless communication circuit includes a signal path, wherein the signal path includes a signal node. The second wireless communication circuit includes a mixer and a local oscillator (LO) buffer. The LO buffer is arranged to receive and buffer an LO signal, and is further arranged to provide the LO signal to the mixer. The auxiliary path is arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.

Abstract: In an example, a computing device includes a non-volatile storage device to store a basic input/output system (BIOS) variable. Further, the computing device includes a BIOS. During a boot process of the computing devices, the BIOS may read the BIOS variable from the non-volatile storage device. Further, the BIOS may detect that an application is to be deployed in the computing device based on the BIOS variable. Furthermore, the BIOS may load an application package from the non-volatile storage device into a volatile storage device and build an advanced configuration and power interface (ACPI) data structure with the application package loaded in the volatile storage device. Further, the BIOS may deploy the application using the ACPI data structure.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

Abstract: A cell penetrating peptide (CPP) according to the present invention is a novel cationic cell penetrating peptide that can effectively transport a biologically active molecule by passing through a cell membrane even when a biologically active molecule is bound thereto, and compared with conventional CPPs, it has excellent cell permeability enabling the transport of a biologically active molecule into cells, and the delivered biologically active molecule may effectively maintain its activity in cells. Accordingly, the CPP of the present invention may be very useful in various fields including cosmetics, diagnostics, drug delivery systems, recombinant protein vaccines, DNA/RNA therapeutics, and gene and protein therapy.

Abstract: The present invention relates to an aqueous polyurethane dispersion, a method for the preparation thereof, a product comprising the same, and use thereof for a coating composition, an impregnating composition, an adhesive or a sealant.

Abstract: The present invention relates to an acid-resistant and alkali-resistant composition, a preparation process thereof and use thereof in producing an article, and an article comprising a substrate coated or impregnated with the same and the preparation method and use of the article. The composition contains: at least one aqueous polyurethane dispersion having a carboxyl group; at least one crosslinking agent having an isocyanate reactive group; at least one crosslinking agent having a carboxyl reactive group; and optionally an additive; wherein, the amount of the carboxyl groups in said aqueous polyurethane dispersion is more than 0.05 wt %, based on the amount of said aqueous polyurethane dispersion being 100 wt %; the amount of said crosslinking agent having an isocyanate reactive group is 0.2 wt %-10 wt %, based on the amount of said composition being 100 wt %; the molar ratio of the carboxyl reactive groups to the carboxyl groups of said composition is more than 0.5.

Abstract: A percussion apparatus for sputum clearance includes a percussion unit, a drive unit, and a control unit, the percussion unit includes a percussion member and an angle detector, the angle detector is configured to detect an included angle between the reference plane and a horizontal plane, the control unit is electrically connected with the drive unit, and when the included angle conforms to a preset angle, the control unit controls the drive unit to drive the percussion unit to periodically percuss, which greatly saves the manpower and increase the efficiency of sputum clearance.