Abstract: A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.

Abstract: The present invention provides a core-shell cathode characterized by comprising: a shell comprising an electrically conductive, porous carbon material; and a core, which is an inner cavity enclosed within the shell, wherein the core contains an active material and an electrolyte, and the active material comprises liquid polysulfide having the general formula Li2Sx, wherein 4?x?8; the shell comprises a first layer, an O-ring and a second layer sequentially stacked from bottom to top to form the inner cavity to contain the active material and the electrolyte. The present invention also provides a lithium-sulfur battery using said core-shell cathode, which attains both high sulfur loading and high sulfur content, and simultaneously satisfies high energy density, high capacity retention and high cycle stability under lean-electrolyte condition.

Abstract: A method for fabricating semiconductor devices includes forming channel regions over a substrate. The channel regions, in parallel with one another, extend along a first lateral direction. Each channel region includes at least a respective pair of epitaxial structures. The method includes forming a gate structure over the channel regions, wherein the gate structure extends along a second lateral direction. The method includes removing, through a first etching process, a portion of the gate structure that was disposed over a first one of the channel regions. The method includes removing, through a second etching process, a portion of the first channel region. The second etching process includes one silicon etching process and one silicon oxide deposition process. The method includes removing, through a third etching process controlled based on a pulse signal, a portion of the substrate that was disposed below the removed portion of the first channel region.

Abstract: A semiconductor structure includes a substrate, a multi-gate FET device disposed over the substrate, a first isolation disposed in the substrate, and a second isolation disposed in the substrate. The multi-gate FET device includes a gate structure and epitaxial source/drain structures disposed at two sides of the gate structure. The first isolation includes a first portion and a second portion over the first portion. A top surface of the second portion is aligned with a top surface of the epitaxial source/drain structures. A width of the second portion is different from a width of the first portion.

Abstract: A method for forming a semiconductor device structure includes forming first nanostructures and second nanostructures over a substrate. The method also includes forming a first metal gate layer surrounding the first nanostructures and over the first nanostructures and the second nanostructures. The method also includes etching back the first metal gate layer over the first nanostructures and the second nanostructures. The method also includes removing the first metal gate layer over the second nanostructures. The method also includes forming a second metal gate layer surrounding the second nanostructures and over the first nanostructures and the second nanostructures.

Abstract: Improved gate structures, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; a gate electrode over the high-k dielectric layer; a conductive cap over and in contact with the high-k dielectric layer and the gate electrode, a top surface of the conductive cap being convex; and first gate spacers on opposite sides of the gate structure, the high-k dielectric layer and the conductive cap extending between opposite sidewalls of the first gate spacers.

Abstract: A novel yellow phosphor of a fluorosulfide having a chemical formula of (A1-x-yCexBy)2Ca1-zSrzF4S2 and a tetragonal crystal phase is disclosed, wherein A and B are different rare earth metals other than Ce, the values of x, y, z are 0<x?1, 0?y?1, and 0?z?1, respectively. A preparation method of the fluorosulfide and white-light emitting diode application thereof are also disclosed.

Abstract: Novel red and green fluorosulfide phosphors have a chemical formula of (A1-x-yCexBy)SF, wherein A and B are both trivalent metal ions, 0<x?0.1, and 0?y?1. A is a rare earth metal, B is a rare earth metal or a group 13 metal. A preparation method of the fluorosulfide and white-light emitting diode application thereof are also disclosed.

Abstract: Novel red and green fluorosulfide phosphors have a chemical formula of (A1-x-yCexBy)SF, wherein A and B are both trivalent metal ions, 0<x?0.1, and 0?y?1. A is a rare earth metal, B is a rare earth metal or a group 13 metal. A preparation method of the fluorosulfide and white-light emitting diode application thereof are also disclosed.

Abstract: A novel yellow phosphor of a fluorosulfide having a chemical formula of (A1-x-yCexBy)2Ce1-zSr2F4S2 and a tetragonal crystal phase is disclosed, wherein A and B are different rare earth metals other than Ce, the values of x, y, z are 0<x?1, 0?y?1, and 0?z?1, respectively. A preparation method of the fluorosulfide and white-light emitting diode application thereof are also disclosed.

Abstract: Novel red and green fluorosulfide phosphors have a chemical formula of (A1-x-yCexBy)SF, wherein A and B are both trivalent metal ions, 0<x?0.1, and 0?y?1. A is a rare earth metal, B is a rare earth metal or a group 13 metal. A preparation method of the fluorosulfide and white-light emitting diode application thereof are also disclosed.

Abstract: A carbonitride phosphor is provided, which is represented by a general chemical formula of (M1-x-yNxCey)2(CN2)3, in which 0.005?x?0.20, 0.005?y?0.15, and M and N are respectively selected from a group consisting of yttrium, lanthanum, cerium, praseodymium, neodymium, samarium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium and cassiopeium.