Patents by Inventor YUN-HYOK CHOI

YUN-HYOK CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11921158
    Abstract: Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: March 5, 2024
    Inventors: Byung-Sung Kim, Yun-Hyok Choi, Gyuyeol Kim, Sungjung Kim, Cheol-Heui Park, Sanghoon Lee, Jae-Woong Choi
  • Publication number: 20230333160
    Abstract: Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.
    Type: Application
    Filed: December 6, 2022
    Publication date: October 19, 2023
    Applicants: Samsung Electronics Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: BYUNG-SUNG KIM, YUN-HYOK CHOI, GYUYEOL KIM, SUNGJUNG KIM, CHEOL-HEUI PARK, SANGHOON LEE, JAE-WOONG CHOI