Patents by Inventor Yun Zong

Yun Zong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100223027
    Abstract: A monitoring method for multi tools is disclosed. The method includes the steps of providing a plurality of measurement tools for measuring the testing points of standard wafers, calculating a vector for representing a measurement tool, calculating the angle between every two of the vectors and determining the measurement tools having the same performance or not. Thereby, the measurement tools can be efficiently grouped and the measuring stability of the measurement tool is analyzed.
    Type: Application
    Filed: May 26, 2009
    Publication date: September 2, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YIJ CHIEH CHU, CHUN CHI CHEN, YUN-ZONG TIAN, SHIH CHANG KAO, CHENG-HAO CHEN
  • Publication number: 20100205127
    Abstract: A method for planning a semiconductor manufacturing process based on users' demands includes the steps of: establishing a genetic algorithm model and inputting data; establishing a fuzzy system and setting one output parameter representing percent difference of each cost function in neighbor generations; setting to have a modulation parameter corresponding to each input parameter for adjusting fuzzy sets of the output parameter; executing genetic algorithm actions; executing fuzzy inference actions; eliminating chromosomes that produce output parameter smaller than a defined lower limit, and the remaining chromosomes that produces the largest output parameter is defined as the optimum chromosome, wherein the genetic algorithm actions stops being executed upon the optimum chromosome; then determining whether or not a defined number of generations has been reached, if yes, executing the optimum chromosome of the last generation; if no, continuing executing the genetic algorithm actions, thereby finding the opti
    Type: Application
    Filed: May 26, 2009
    Publication date: August 12, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventors: WEI JUN CHEN, CHUN CHI CHEN, YUN-ZONG TIAN, YI FENG LEE, TSUNG-WEI LIN
  • Publication number: 20100128272
    Abstract: There is disclosed a method and system for detecting a surface plasmon resonance associated with a fluid sample. The method includes the step of providing a piezoelectric substrate having at least two electrodes thereon, wherein at least one of said electrodes is coupled to a fluid sample. A light beam is transmitted toward the fluid sample to induce a oscillation frequency in the piezoelectric substrate. The oscillation frequency from said electrodes is then measured during transmittance of the light to detect the surface plasmon resonance associated with the fluid sample.
    Type: Application
    Filed: November 23, 2007
    Publication date: May 27, 2010
    Applicant: Agency for Science Technology and Research
    Inventors: Yun Zong, Wolfgang Knoll, Xiaodi Su
  • Publication number: 20100093114
    Abstract: A method of searching for the key semiconductor operation with randomization for wafer position, comprising: recording the wafer position and the wafer yields of a plurality of wafer ID respectively corresponding to a plurality of semiconductor operations; establishing a matrix model which describes the matrix set for wafer yields of the plurality of wafer ID; analyzing the matrix model, further computing the matrix set for wafer yields of the wafer ID, thereby acquiring the weightings of the randomized wafer positions in such semiconductor operations; and searching for a key semiconductor operation among the plurality of semiconductor operations; herein, by using a local regression model to estimate the wafer position effect, computing the weighting of the position effect in each semiconductor operation based on the estimated position effect and the randomized wafer yield, higher weighting thereof indicates the key semiconductor operation having greater position effect in the aforementioned semiconductor pro
    Type: Application
    Filed: December 9, 2008
    Publication date: April 15, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YIJ CHIEH CHU, CHUN CHI CHEN, YUN-ZONG TIAN, CHENG-HAO CHEN
  • Publication number: 20100049355
    Abstract: A method for determining manufacturing tool production quality includes providing a table with manufacturing process data. The table is analyzed and a contingency table is established. The contingency table comprises several manufacturing tools, manufacturing processes, and the number of occurrences of bad lots. Split the contingency table up into a plurality of sub-tables. Use Cochran-Mantel-Haenszel test for determining the number of bad lots produced by the manufacturing tools and getting a plurality of statistics. Translate the statistics into a plurality of P-values. Sort the P-values for examining data automatically. Draw a line chart for detecting substandard manufacturing tools. As a result, users can diagnose the quality of the manufacturing tools.
    Type: Application
    Filed: November 24, 2008
    Publication date: February 25, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YIJ CHIEH CHU, CHUN CHI CHEN, YUN-ZONG TIAN, CHENG-HAO CHEN
  • Publication number: 20100010763
    Abstract: A method of detecting variance by regression model is disclosed. Said method comprising: preparing the FDC and WAT data for analysis, figuring out what latent variable effect WAT by Factor Analysis, utilizing Principal Component Analysis to reduce the number of FDC variables to a few independent principal components, demonstrating how the tool and FDC affect WAT by Analysis of covariance model, and constructing interrelationship among FDC, WAT and tools. The interrelationship can point out which parameter effect WAT significantly. By the method, when WAT abnormal situation happened, it is easier for engineers to trace where the problem is.
    Type: Application
    Filed: September 2, 2008
    Publication date: January 14, 2010
    Applicant: INOTERA MEMORIES INC.
    Inventors: YIJ CHIEH CHU, CHUN CHI CHEN, YUN-ZONG TIAN, YI FENG LEE
  • Publication number: 20100004882
    Abstract: A fault detection and classification (FDC) method for wafer acceptance test (WAT) parameters includes the following steps. A plurality of fault detection and classification parameters is collected. A plurality of wafer acceptance test parameters that are corresponded by the fault detection and classification parameters is collected. The fault detection and classification parameters are grouped. A contingency table of the wafer acceptance test parameters corresponding to the fault detection and classification parameters is built. A probability model of the contingency table is built. Finally, a safety range of the probability model is determined.
    Type: Application
    Filed: August 29, 2008
    Publication date: January 7, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YIJ CHIEH CHU, CHUN CHI CHEN, YUN-ZONG TIAN, CHENG-HAO CHEN
  • Publication number: 20090327173
    Abstract: A method for predicting cycle time comprises the steps of: collecting a plurality of known sets of data; using a clustering method to classify the known sets of data into a plurality of clusters; using a decision tree method to build a classification rule of the clusters; building a prediction model of each cluster; preparing data predicted set of data; using the classification rule to determine that to which clusters the predicted set of data belongs; and using the prediction model of the cluster to estimate the objective cycle time of the predicted set of data. Therefore, engineers can beforehand know the cycle time that one lot of wafers spend in the forward fabrication process, which helps engineers to properly arrange the following fabrication process of the lot of wafer.
    Type: Application
    Filed: October 1, 2008
    Publication date: December 31, 2009
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YI FENG LEE, CHUN CHI CHEN, YUN-ZONG TIAN, TSUNG-WEI LIN
  • Publication number: 20090276182
    Abstract: A machine fault detection method is applied to a plurality of machines. The machines are used for processing at least one wafer-in-process (WIP). The method includes the flowing steps. A statistical database of the wafer-in-process is provided. An association rules is used to search and survey the statistical database in order to calculate a support degree and a reliability degree. A threshold is selected to determine whether the support degree and the reliability degree have surpassed the threshold or not. When the support degree and the reliability degree have surpassed the threshold, a root cause error in the statistical database corresponded by the support degree and the reliability degree is determined. When the support degree and the reliability degree have not surpassed the threshold, the above steps are repeated.
    Type: Application
    Filed: June 17, 2008
    Publication date: November 5, 2009
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YI FENG LEE, CHUN CHI CHEN, YUN-ZONG TIAN
  • Publication number: 20090259332
    Abstract: A method of fuzzy control for adjusting a semiconductor machine comprising: providing measurement values from first the “parameter of a pre-semiconductor manufacturing process”, second the “parameter of the semiconductor manufacturing process”, and third the “operation parameter of the semiconductor manufacturing process”; performing a fuzzy control to define two inputs and one output corresponding to the measurement values, wherein the difference between the first and third values, and the difference between the second and third values, forms the two inputs, then from the two inputs one target output is calculated by fuzzy inference; finally, determining if the target output is in or out of an acceptable range. Whereby the target output is the “machine control parameter of the semiconductor manufacturing process” and when within an acceptable range is used for adjusting the semiconductor machine.
    Type: Application
    Filed: September 30, 2008
    Publication date: October 15, 2009
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YI FENG LEE, TZU-CHENG LIN, CHUN CHI CHEN, YUN-ZONG TIAN
  • Publication number: 20090197354
    Abstract: A system and method for monitoring a manufacturing process are provided. A wafer is provided. Process parameters of a manufacturing machine are in-situ measured and recorded if the wafer is processed in the manufacturing machine. A wafer measured value of the wafer is measured after the wafer has been processed. The process parameters are transformed into a process summary value. A two dimensional orthogonal chart with a first axis representing the wafer measured value and a second axis representing the process summary value is provided. The two dimensional orthogonal chart includes a close-loop control limit. A visualized point representing the wafer measured value and the process summary value is displayed on the two dimensional orthogonal chart.
    Type: Application
    Filed: June 23, 2008
    Publication date: August 6, 2009
    Applicant: INOTERA MEMORIES, INC.
    Inventors: Tzu-Cheng Lin, Yun-Zong Tian, Chun-Chi Chen, Yi-Feng Lee