Patents by Inventor Yung-Fu Shen

Yung-Fu Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7998772
    Abstract: A method for forming a protection diode utilizes processing operations and materials used in the formation of the CMOS integrated circuit device and provides a protection diode used in CMOS integrated circuit devices to direct charged particles to benign locations and prevent damage to the devices. The protection diode includes a well region of a first conductivity type formed in a surface of a semiconductor substrate, a heavily doped P-type impurity region disposed within the well region, a heavily doped N-type impurity region disposed within the well region and an STI structure interposed therebetween. A top surface of the STI structure extends above the surface. A silicide resistant block-out layer is formed over the STI structure and extends laterally beyond the STI structure, covering any counterdoped sections that may undesirably be formed in the substrate adjacent the STI structure during implantation operations.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: August 16, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Bor-Zen Tien, Tzong-Sheng Chang, Yung-Fu Shen, Jieh-Ting Chang
  • Publication number: 20100081249
    Abstract: A method for forming a protection diode utilizes processing operations and materials used in the formation of the CMOS integrated circuit device and provides a protection diode used in CMOS integrated circuit devices to direct charged particles to benign locations and prevent damage to the devices. The protection diode includes a well region of a first conductivity type formed in a surface of a semiconductor substrate, a heavily doped P-type impurity region disposed within the well region, a heavily doped N-type impurity region disposed within the well region and an STI structure interposed therebetween. A top surface of the STI structure extends above the surface. A silicide resistant block-out layer is formed over the STI structure and extends laterally beyond the STI structure, covering any counterdoped sections that may undesirably be formed in the substrate adjacent the STI structure during implantation operations.
    Type: Application
    Filed: December 3, 2009
    Publication date: April 1, 2010
    Inventors: Bor-Zen Tien, Tzong-Sheng Chang, Yung-Fu Shen, Jieh-Ting Chang
  • Patent number: 7663164
    Abstract: A protection diode is used in a CMOS integrated circuit device to direct charged particles to benign locations and prevent damage to the device. The protection diode includes a well region of a first conductivity type formed in a surface of a semiconductor substrate, a heavily doped P-type impurity region disposed within the well region, a heavily doped N-type impurity region disposed within the well region and an STI structure interposed therebetween. A top surface of the STI structure extends above the surface. A silicide resistant block-out layer is formed over the STI structure and extends laterally beyond the STI structure, covering any counterdoped sections that may undesirably be formed in the substrate adjacent the STI structure during implantation operations. The method for forming the structure utilizes processing operations and materials used in the formation of the CMOS integrated circuit device.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: February 16, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bor-Zen Tien, Tzong-Sheng Chang, Yung-Fu Shen, Jieh-Ting Chang
  • Publication number: 20060163657
    Abstract: A protection diode is used in a CMOS integrated circuit device to direct charged particles to benign locations and prevent damage to the device. The protection diode includes a well region of a first conductivity type formed in a surface of a semiconductor substrate, a heavily doped P-type impurity region disposed within the well region, a heavily doped N-type impurity region disposed within the well region and an STI structure interposed therebetween. A top surface of the STI structure extends above the surface. A silicide resistant block-out layer is formed over the STI structure and extends laterally beyond the STI structure, covering any counterdoped sections that may undesirably be formed in the substrate adjacent the STI structure during implantation operations. The method for forming the structure utilizes processing operations and materials used in the formation of the CMOS integrated circuit device.
    Type: Application
    Filed: January 26, 2005
    Publication date: July 27, 2006
    Inventors: Bor-Zen Tien, Tzong-Sheng Chang, Yung-Fu Shen, Jieh-Ting Chang