Abstract: A method of manufacturing a graphene electronic device may include forming a metal compound layer and a catalyst layer on a substrate, the catalyst layer including a metal element in the metal compound layer, growing a graphene layer on the catalyst layer, and converting the catalyst layer into a portion of the metal compound layer.

Abstract: A method of manufacturing a graphene electronic device may include forming a metal compound layer and a catalyst layer on a substrate, the catalyst layer including a metal element in the metal compound layer, growing a graphene layer on the catalyst layer, and converting the catalyst layer into a portion of the metal compound layer.

Abstract: Methods of manufacturing non-volatile memory devices that can reduce or prevent loss of charges stored in a charge storage layer and/or that can improve charge storage capacity by neutral beam irradiation of an insulating layer are disclosed. The methods include forming a tunneling insulating layer on a substrate, forming a charge storage layer on the tunneling insulating layer, forming a blocking insulating layer on the charge storage layer, irradiating the blocking insulating layer and/or the tunneling insulating layer with a neutral beam, and forming a gate conductive layer on the blocking insulating layer.

Abstract: An apparatus and method to generate plasma which can be applied to semiconductor processing. The apparatus includes a chamber having a plasma generating space defined therein, a lower electrode positioned within the chamber, an upper electrode facing the lower electrode and disposed within the chamber to constitute a first plasma generating source, a second plasma generating source positioned at a higher location than that of a lower surface of the upper electrode and disposed at an outer circumference of the upper electrode, and a power supply to supply power to the first and second plasma generating sources.

Abstract: Methods of manufacturing non-volatile memory devices that can reduce or prevent loss of charges stored in a charge storage layer and/or that can improve charge storage capacity by neutral beam irradiation of an insulating layer are disclosed. The methods include forming a tunneling insulating layer on a substrate, forming a charge storage layer on the tunneling insulating layer, forming a blocking insulating layer on the charge storage layer, irradiating the blocking insulating layer and/or the tunneling insulating layer with a neutral beam, and forming a gate conductive layer on the blocking insulating layer.

Abstract: An etching apparatus using a neutral beam includes an electron emission unit to convert an ion beam, extracted from plasma by a plurality of grids, into a neutral beam by colliding the ion beam with electrons to prevent the ion beam from physically colliding with the electron emission unit, thus preventing the damage to a neutralization unit and generation of foreign substances with a simple structure. Further, the etching apparatus converts the ion beam into the neutral beam at a high neutralizing efficiency without causing directionality and energy losses, and generates a neutral beam having a large area, thus uniformly etching a semiconductor wafer.

Abstract: An anti-reflective hard mask layer left on a radiation-blocking layer during fabrication of a reticle provides functionality when the reticle is used in a semiconductor device manufacturing process.

Abstract: An apparatus and method to generate plasma which can be applied to semiconductor processing. The apparatus includes a chamber having a plasma generating space defined therein, a lower electrode positioned within the chamber, an upper electrode facing the lower electrode and disposed within the chamber to constitute a first plasma generating source, a second plasma generating source positioned at a higher location than that of a lower surface of the upper electrode and disposed at an outer circumference of the upper electrode, and a power supply to supply power to the first and second plasma generating sources.

Abstract: An ion analysis system to measure ion energy distribution at several points during a process of manufacturing a semiconductor circuit includes at least two ion flux sensors combined in a single system to measure an ion energy distribution function, each of the ion flux sensors having cells including an opening of 50 micrometers or less.

Abstract: Methods and apparatus for controlling the critical dimensions and monitoring the phase shift angles of photomasks. Critical dimensions measurement data before wafer processing and after wafer processing are collected by an integrated metrology tool to adjust the process recipe, to determine if the critical dimensions are in specification and to determine if additional etching is required. Phase shift angle and uniformity across substrate measurement after wafer processing are collected by an integrated metrology tool to determine if the phase shift angle and its uniformity are in specification. The real time process recipe adjustment and determination if additional etching is requires allow tightening of the process control. The phase shift angle and uniformity monitoring allows in-line screening of phase shift photomasks.

Abstract: An ion beam extractor controls a direction and an intensity of ion beams by adjusting a voltage applied to a grid having slits formed therein, thereby enhancing uniformity of an etching rate of a wafer, leading to an increase of productivity of semiconductor diodes. The ion beam extractor comprises an ion source to produce an ion beam and at least one grid located at a rear end of the ion source in a progressing path of the ion beam produced by the ion source to adjust a direction of the ion beam by controlling a voltage applied to the at least one grid.

Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a metal layer disposed on an optically transparent material in a processing chamber, introducing a processing gas processing gas comprising an oxygen containing gas, a chlorine containing gas, and a chlorine-free halogen containing gas, and optionally, an inert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, and etching exposed portions of the metal layer disposed on the substrate.

Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a metal layer disposed on an optically transparent material in a processing chamber, introducing a processing gas processing gas comprising an oxygen containing gas, a chlorine containing gas, and a chlorine-free halogen containing gas, and optionally, an inert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, and etching exposed portions of the metal layer disposed on the substrate.

Abstract: An apparatus to treat a substrate including a vacuum chamber having a plasma space where plasma is generated and a treating space where a substrate is treated, an extract electrode disposed between the plasma space and the treating space, a power supply to provide power to the extract electrode, and a controller to control the power supply so that a cation beam and a negative charge beam are alternately extracted from a plasma in the plasma space to the treating space.

Abstract: An ion beam extractor controls a direction and an intensity of ion beams by adjusting a voltage applied to a grid having slits formed therein, thereby enhancing uniformity of an etching rate of a wafer, leading to an increase of productivity of semiconductor diodes. The ion beam extractor comprises an ion source to produce an ion beam and at least one grid located at a rear end of the ion source in a progressing path of the ion beam produced by the ion source to adjust a direction of the ion beam by controlling a voltage applied to the at least one grid.

Abstract: We have reduced the critical dimension bias for reticle fabrication. Pattern transfer to the radiation-blocking layer of the reticle substrate essentially depends upon use of a hard mask to which the pattern is transferred from a photoresist. The photoresist pull back which occurs during pattern transfer to the hard mask is minimalized. In addition, a hard mask material having anti-reflective properties which are matched to the reflective characteristics of the radiation-blocking layer enables a reduction in critical dimension size and an improvement in the pattern feature integrity in the hard mask itself. An anti-reflective hard mask layer left on the radiation-blocking layer provides functionality when the reticle is used in a semiconductor device manufacturing process.

Abstract: Methods and apparatus for controlling the critical dimensions and monitoring the phase shift angles of photomasks. Critical dimensions measurement data before wafer processing and after wafer processing are collected by an integrated metrology tool to adjust the process recipe, to determine if the critical dimensions are in specification and to determine if additional etching is required. Phase shift angle and uniformity across substrate measurement after wafer processing are collected by an integrated metrology tool to determine if the phase shift angle and its uniformity are in specification. The real time process recipe adjustment and determination if additional etching is requires allow tightening of the process control. The phase shift angle and uniformity monitoring allows in-line screening of phase shift photomasks.