Abstract: A transmitter circuit is provided. The transmitter circuit has a first transmission node and a second transmission node and includes a first resistor, a second resistor, a third resistor, a fourth resistor, and a driving circuit. The driving circuit includes a first transistor group, a second transistor group, a third transistor group, and a fourth transistor group. The first resistor is coupled between a first output terminal and the first transmission node. The second resistor is coupled between a second output terminal and the second transmission node. The third resistor is coupled between a third output terminal and the first transmission node. The fourth resistor is coupled between a fourth output terminal and the second transmission node. The first, second, third, and fourth transistor groups are coupled to a first and a second reference voltages and electrically connected to the first, second, third, and fourth output terminals, respectively.

Abstract: A transmission-end impedance matching circuit operates according to a signal of an overvoltage signal source and includes a first level shifter, a voltage generating circuit, and an impedance matching circuit. The first level shifter generates a first conversion voltage according to a source signal and operates between a first high voltage and a ground voltage. The voltage generating circuit generates a second high voltage according to the first conversion voltage, the first high voltage, and a medium voltage. The impedance matching circuit includes a second level shifter, a transistor, and two resistors. The second level shifter generates a gate voltage according to the second high voltage, a low voltage, and an input signal. The transistor is turned on/off according to the gate voltage and has a withstand voltage lower than the first high voltage. Each of the two resistors is coupled between the transistor and a differential signal transmission end.

Abstract: An output stage of an Ethernet transmitter is provided. The output stage is coupled to a resistor and includes a first output terminal, a second output terminal, a first transistor, and a first transistor group. The resistor is coupled between the first output terminal and the second output terminal. The first transistor has a first source, a first drain, and a first gate, the first source being coupled to a first reference voltage and the first drain being coupled to the second output terminal. The first transistor group is coupled to the first reference voltage and the first output terminal. The first transistor group includes multiple transistors which are connected in parallel, and the magnitude of the current flowing to the first output terminal is related to the number of transistors that are turned on.

Abstract: A transmitter circuit is provided. The transmitter circuit has an input port, a first transmission node, a second transmission node, a third transmission node, and a fourth transmission node and includes a first operational amplifier, a first output stage, a first resistor-capacitor network, a first switch group coupled between the first resistor-capacitor network and the input port, a first impedance matching circuit coupled to the first output stage, the first transmission node, and the second transmission node, a second operational amplifier, a second output stage, a second resistor-capacitor network, a second switch group coupled between the second resistor-capacitor network and the input port, and a second impedance matching circuit coupled to the second output stage, the third transmission node, and the fourth transmission node.

Abstract: An amplifier circuit includes a continuous-time linear equalizer, an adjustable gain circuit and a filter circuit. The continuous-time linear equalizer includes a first high-pass path, a first low-pass path, a second high-pass path, and a second low-pass path. The first high-pass path is used to increase a gain of a high-frequency part of a first signal source, and the second high-pass path is used to increase a gain of a high-frequency part of a second signal source. The filter circuit is used to amplify and filter the first signal source and the second signal source, and includes a fully-differential operational amplifier, a first filter network, and a second filter network.

Abstract: An integrated circuit layout and an integrated circuit layout method for a filter are provided. The method includes: determining a structure of a target filter circuit that includes a capacitor and a first optional component; reserving a first circuit region; disposing the first optional component in the first circuit region, and electrically connecting the first optional component, through a plurality of first wires located in a first metal layer, to a plurality of first external nodes that are outside the first circuit region; electrically connecting the plurality of first external nodes to a plurality of second wires located in a second metal layer, respectively, in which the second wires are disposed around the first circuit region; and disposing the capacitor in the first circuit region and above the first optional component.

Abstract: A level shifter can achieve a level shift by a wide margin. The level shifter includes a latch circuit, a clamping circuit, a protection circuit, and an input circuit. The latch circuit is coupled between a high-voltage terminal and a pair of output terminals for outputting a pair of output signals. The clamping circuit is coupled between a medium-voltage terminal and the pair of output terminals and limits the minimum voltage of the pair of output signals to the medium voltage. The protection circuit is set between the latch circuit and the input circuit, and prevents an excessive voltage drop between the input circuit and the pair of output terminals. The input circuit includes an input transistor pair coupled between the protection circuit and a low-voltage terminal having a low voltage. The input transistor pair receives a pair of input signals and operates accordingly.

Abstract: A transmission-end impedance matching circuit operates according to a signal of an overvoltage signal source and includes a first level shifter, a voltage generating circuit, and an impedance matching circuit. The first level shifter generates a first conversion voltage according to a source signal and operates between a first high voltage and a ground voltage. The voltage generating circuit generates a second high voltage according to the first conversion voltage, the first high voltage, and a medium voltage. The impedance matching circuit includes a second level shifter, a transistor, and two resistors. The second level shifter generates a gate voltage according to the second high voltage, a low voltage, and an input signal. The transistor is turned on/off according to the gate voltage and has a withstand voltage lower than the first high voltage. Each of the two resistors is coupled between the transistor and a differential signal transmission end.

Abstract: The present invention discloses an overvoltage-proof circuit capable of preventing damage caused by an overvoltage at moments of starting and/or stopping operation. An embodiment of the overvoltage-proof circuit includes a protected circuit and a protecting circuit. The protected circuit receives a power supply voltage to operate, and includes: a protected component, in which an upmost voltage that the protected component can withstand is lower than the power supply voltage; and at least one operational switch(es) operable to enable or disable the protected circuit according to an enabling signal. The protecting circuit is coupled to the protected component, and starts protecting the protected circuit from an overvoltage before a transition of the enabling signal, in which the overvoltage is greater than the upmost voltage.

Abstract: The present invention discloses an overvoltage-proof circuit capable of preventing damage caused by an overvoltage at moments of starting and/or stopping operation. An embodiment of the overvoltage-proof circuit includes a protected circuit and a protecting circuit. The protected circuit receives a power supply voltage to operate, and includes: a protected component, in which an upmost voltage that the protected component can withstand is lower than the power supply voltage; and at least one operational switch(es) operable to enable or disable the protected circuit according to an enabling signal. The protecting circuit is coupled to the protected component, and starts protecting the protected circuit from an overvoltage before a transition of the enabling signal, in which the overvoltage is greater than the upmost voltage.

Abstract: A Pre-distortion mechanism for transmit path non-linearity in xDSL AFE is disclosed in the present invention. The AFE includes a line driver and a pre-distortion signal generator. The line driver receives an input differential signal and generates an output differential signal. The input differential signal includes a first input signal and a second input signal. The output differential signal includes a first output signal and a second output signal. The line driver receives the first input signal to generate the first output signal and receives the second input signal to generate the second output signal. The pre-distortion signal generator is coupled to input ends and output ends of the line driver.

Abstract: This invention discloses a signal transmitting and receiving circuit of a digital subscriber line used for transmitting an output signal to a telecommunication loop or receiving an input signal from the telecommunication loop. The signal transmitting and receiving circuit comprises a transformer, which is coupled to the telecommunication loop; a signal transmitting module, which is coupled to the transformer, for generating the output signal; a signal receiving module, which is coupled to the transformer, for processing the input signal; an echo cancelling circuit, comprising passive components and having two ends, one of which is coupled to the signal transmitting module and the transformer, the other is coupled to the signal receiving module and the transformer. The output signal is transmitted to the telecommunication loop via the electromagnetic coupling of the transformer, and the input signal is received by the signal receiving module by the electromagnetic coupling of the transformer.

Abstract: This invention discloses a signal transmitting and receiving circuit of a digital subscriber line used for transmitting an output signal to a telecommunication loop or receiving an input signal from the telecommunication loop. The signal transmitting and receiving circuit comprises a transformer, which is coupled to the telecommunication loop; a signal transmitting module, which is coupled to the transformer, for generating the output signal; a signal receiving module, which is coupled to the transformer, for processing the input signal; an echo cancelling circuit, comprising passive components and having two ends, one of which is coupled to the signal transmitting module and the transformer, the other is coupled to the signal receiving module and the transformer. The output signal is transmitted to the telecommunication loop via the electromagnetic coupling of the transformer, and the input signal is received by the signal receiving module by the electromagnetic coupling of the transformer.

Abstract: A Pre-distortion mechanism for transmit path non-linearity in xDSL AFE is disclosed in the present invention. The AFE includes a line driver and a pre-distortion signal generator. The line driver receives an input differential signal and generates an output differential signal. The input differential signal includes a first input signal and a second input signal. The output differential signal includes a first output signal and a second output signal. The line driver receives the first input signal to generate the first output signal and receives the second input signal to generate the second output signal. The pre-distortion signal generator is coupled to input ends and output ends of the line driver.

Abstract: An optical lens for modulating light generated by a surface-emitting laser chip is disclosed. The optical lens includes a main body with a recess. A bottom surface of the recess is configured with a light-entering curved face, and an outer surface of the main body opposite to the bottom surface is configured with a light-existing curved face. Here, the recess is for accommodating the surface-emitting laser chip, and the surface-emitting laser chip is arranged a distance from the light-entering curved face. A light-emitting module adopting the aforementioned optical lens is also provided. The aforementioned optical lens would cause the incident light to first diverge and then converge at a predetermined angle, so that the output illuminating light is more uniform and the projecting distance is extended.

Abstract: An integrated and simplified source driver system includes a scan driver and a data driver. The data driver has a signal controller and a plurality of data driver units each of which has a converter. The converter can convert a first control signal into display data, a driver-unit control signal and a second control signal. The data driver unit can correspondingly send a data drive signal to one of thin film transistors according to the display data and the driver-unit control signal. The second control signal is sent to the scan driver for generating a scan drive signal which is correspondingly sent to one of the thin film transistors. In a preferred embodiment, the first control signal includes an integrated drive-unit control command.

Abstract: A data communication system comprising a first transmitter set configured to transmit a first output based on a first signal, the first output including one of a training pattern and a first data, the training pattern and the first data including clock information, a second transmitter set configured to transmit a second output based on the first signal, the second output including one of the training pattern and a second data, a first receiver set configured to generate a first received data based on the first output, a second receiver set configured to generate a second received data based on the second output, a clock and data recovery (CDR) circuit configured to extract the clock information based on the first signal and the first received data and provide a second signal indicating whether a frequency in-lock status is reached, a phase control circuit in the second receiver set, the phase control circuit being configured to detect a phase difference between the first received data and the second received

Abstract: A light emitting diode (LED) lamp includes a base and a pivotally turnable lamp holder connected to the base. The lamp holder is internally provided with at least one LED and a heat sink. The heat sink has a plurality of longitudinally spaced rows of upright radiating fins provided thereon with the radiating fins in each row transversely spaced from one another and a long slot having a predetermined length formed between any two adjacent radiating fins in each row. The heat sink is also provided with at least one round mounting hole for the LED to mount therein. The heat sink and the radiating fins and long slots provided thereon help in dissipating heat produced by the LED during the operation thereof to thereby enable prolonged usable life of the LED lamp.

Abstract: A data communication system comprising a first transmitter set configured to transmit a first output based on a first signal, the first output including one of a training pattern and a first data, the training pattern and the first data including clock information, a second transmitter set configured to transmit a second output based on the first signal, the second output including one of the training pattern and a second data, a first receiver set configured to generate a first received data based on the first output, a second receiver set configured to generate a second received data based on the second output, a clock and data recovery (CDR) circuit configured to extract the clock information based on the first signal and the first received data and provide a second signal indicating whether a frequency in-lock status is reached, a phase control circuit in the second receiver set, the phase control circuit being configured to detect a phase difference between the first received data and the second received

Abstract: A light source lens includes a circular lens mount defining a shallow concave recess with a square opening, and a lens engaged with the lens mount to locate above the concave recess to receive light projected thereto via the square opening. The lens includes a first spherical portion and a second spherical portion protruded from a top center of the first spherical portion, and is densely provided at a bottom with a plurality of irregular grooves to form an uneven bottom surface. The first and the second spherical portion diffuses and concentrates, respectively, a light source passed through the lens, and the uneven bottom surface of the lens causes the light passed therethrough to scatter at more different angles, so that any halo is eliminated and a softer lighting effect is created.