Patents by Inventor Yung-Teng Tsai

Yung-Teng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Die
    Patent number: 10510677
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 17, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • Patent number: 10156526
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 18, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • DIE
    Publication number: 20180356348
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • Publication number: 20180356347
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • Patent number: 10082471
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Grant
    Filed: January 2, 2017
    Date of Patent: September 25, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • Publication number: 20180188185
    Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
    Type: Application
    Filed: January 2, 2017
    Publication date: July 5, 2018
    Inventors: Yung-Teng Tsai, Hung-Chin Lin, Chia-Chen Sun, Chih-Yu Wu, Jun-Ming Chen, Chung-Chih Hung, Sheng-Chieh Chen
  • Publication number: 20170207060
    Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 20, 2017
    Inventors: Kuan-Chun Lin, Chih-Chieh Chou, Shih-Cheng Chen, Chung-Chih Hung, Yung-Teng Tsai, Chi-Hung Chan
  • Patent number: 9711326
    Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: July 18, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuan-Chun Lin, Chih-Chieh Chou, Shih-Cheng Chen, Chung-Chih Hung, Yung-Teng Tsai, Chi-Hung Chan
  • Patent number: D645089
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 13, 2011
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D645902
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 27, 2011
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D645903
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 27, 2011
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D645904
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 27, 2011
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D655346
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: March 6, 2012
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D655754
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 13, 2012
    Assignee: Officemate International Corp.
    Inventors: Jungkun Lee, Yung-Teng Tsai
  • Patent number: D665847
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: August 21, 2012
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D687892
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: August 13, 2013
    Assignee: Officemate International Corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D697135
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: January 7, 2014
    Assignee: Officemate International corp.
    Inventor: Yung-Teng Tsai
  • Patent number: D697553
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: January 14, 2014
    Assignee: Officemate International Corp.
    Inventors: Jungkun Lee, Yung-Teng Tsai
  • Patent number: D697554
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: January 14, 2014
    Assignee: Officemate International Corp.
    Inventors: Jungkun Lee, Yung-Teng Tsai
  • Patent number: D697973
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: January 21, 2014
    Assignee: Officemate International Corp.
    Inventors: Jungkun Lee, Yung-Teng Tsai