Patents by Inventor Yung- Hsun Chen

Yung- Hsun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11988625
    Abstract: A capacitive biosensor is provided. The capacitive biosensor includes: a transistor, an interconnect structure on the transistor, and a passivation layer on the interconnect structure. The interconnect structure includes a first metal structure on the transistor, a second metal structure on the first metal structure, and a third metal structure on the second metal structure. The third metal structure includes a first conductive layer, a second conductive layer, and a third conductive layer that are sequentially stacked. The passivation has an opening exposing a portion of the third metal structure. The capacitive biosensor further includes a sensing region on the interconnect structure. The sensing region includes a first sensing electrode and a second sensing electrode. The first sensing electrode is formed of the third conductive layer, and the second sensing electrode is disposed on the passivation layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 21, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Ping Chang, Chien-Hui Li, Chien-Hsun Wu, Tai-I Yang, Yung-Hsiang Chen
  • Publication number: 20240153860
    Abstract: An electronic device is provided. The electronic device includes a redistribution structure, an electronic unit and a first conductive pad. The first conductive pad is disposed between the redistribution structure and the electronic unit. The electronic unit is electrically connected to the redistribution structure through the first conductive pad. The first conductive pad has a first coefficient of thermal expansion and a first Young's modulus. The first coefficient of thermal expansion and the first Young's modulus conform to the following formula: 0.7×(0.0069E2?1.1498E+59.661)?CTE?1.3×(0.0069E2?1.1498E+59.661), wherein CTE is the first coefficient of thermal expansion, and E is the first Young's modulus in the formula.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 9, 2024
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Yung-Feng CHEN, Ming-Hsien SHIH
  • Publication number: 20240145370
    Abstract: A semiconductor device includes a first region and a second region, and the second region surrounds the first region. The semiconductor device includes at least one electronic unit, a redistribution structure, a plurality of first pads, and a plurality of second pads. The redistribution structure may be electrically connected to at least one electronic unit. A plurality of first pads are arranged on the redistribution structure and correspondingly to the first region. There is a first pitch between two adjacent first pads. A plurality of second pads are arranged on the redistribution structure and correspondingly to the second region. There is a second pitch between two adjacent second pads, so that the first pitch is smaller than the second pitch.
    Type: Application
    Filed: December 18, 2022
    Publication date: May 2, 2024
    Applicant: InnoLux Corporation
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Ming-Hsien SHIH, Yung-Feng CHEN, Cheng-Chi WANG
  • Publication number: 20150191940
    Abstract: A multi-functional lock may include a main body, a control unit, a connecting unit and a securing unit. The multi-functional lock is advantageous because the main body uses the connecting unit to control the securing unit and control unit, and a rod and a locking unit are independent components, so when the user is conducting a forcefully unlocking process, only the rod is damaged without damaging the main body and the rod can be easily replaced.
    Type: Application
    Filed: May 11, 2014
    Publication date: July 9, 2015
    Inventors: An-Jan Chen, Yung- Hsun Chen
  • Patent number: D763845
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: August 16, 2016
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Li-Yen Wang, Tsui-Wei Lin, Yung-Hsun Chen, Ming-Chih Huang, Chin-Rang Ku, Yi-Ting Chen, Po-Wen Huang, Yen-Chih Chen, Ying-Chou Chen, Tang-Lung Lo
  • Patent number: D768620
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: October 11, 2016
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Li-Yen Wang, Tsui-Wei Lin, Yung-Hsun Chen, Ming-Chih Huang, Chin-Rang Ku, Yi-Ting Chen, Po-Wen Huang, Yen-Chih Chen, Ying-Chou Chen, Tang-Lung Lo