Abstract: Embodiments of the present disclosure provide a detection circuit for a laser fault injection attack on a chip and a security chip. The detection circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a photosensitive element, a first NMOS transistor, and a second NMOS transistor. A drain of the first NMOS transistor is configured to output a first voltage signal, and a drain of the second NMOS transistor is configured to output a second voltage signal. The first voltage signal and the second voltage signal are configured to indicate that the chip is attacked by laser fault injection, thereby realizing detection of the laser fault injection attack, and ensuring the robustness and security of the chips.

Abstract: The present disclosure provides an image sensor including a substrate (400) and at least one pixel unit. The pixel unit comprises a photodetector (401) arranged in the substrate, a photosensitive surface of the photodetector facing a back surface of the substrate to generate a charge upon receiving an incident light from the back surface of the substrate, a spherical crown structure (406) arranged on the substrate and located on an opposite surface of the photosensitive surface, a conformal dielectric layer (420) arranged on the spherical crown structure and used to generate a dielectric-layer reflective light when the incident light reaches the conformal dielectric layer, and a reflective layer (430) arranged on the conformal dielectric layer and used to generate a reflective-layer reflective light when the incident light reaches the reflective layer. In this way, an absorption ratio for the incident light is increased, thereby improving signal quality of an image.

Abstract: Embodiments of the present disclosure provide a detection circuit for a laser fault injection attack on a chip and a security chip. The detection circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a photosensitive element, a first NMOS transistor, and a second NMOS transistor. A drain of the first NMOS transistor is configured to output a first voltage signal, and a drain of the second NMOS transistor is configured to output a second voltage signal. The first voltage signal and the second voltage signal are configured to indicate that the chip is attacked by laser fault injection, thereby realizing detection of the laser fault injection attack, and ensuring the robustness and security of the chips.

Abstract: The present disclosure provides a low dropout regulator circuit including an error amplifying circuit, a charge pump circuit, and an output feedback circuit. An output terminal of the error amplifying circuit is connected to an input terminal of the charge pump circuit. The charge pump circuit includes a first switch module, a first energy storage module, a third switch module, a parasitic capacitor, a second switch module, a second energy storage module, and a clock control circuit which is respectively connected to the first switch module, the third switch module, and the second switch module to control turn-on and turn-off of the first switch module, the third switch module and the second switch module. An output terminal of the charge pump circuit is connected to the output feedback circuit, and the output feedback circuit is connected to the error amplifying circuit, thereby providing a higher voltage, and reducing voltage fluctuations.

Abstract: The present disclosure provides an interactive method and apparatus based on user action information, and an electronic device. The method includes: judging whether a collected first image includes face information of N users authenticated by a terminal, where N is an integer greater than or equal to 2; recognizing action information of the N users in the first image, if the first image includes the face information of the N users authenticated by the terminal; determining, according to preset action information and the action information of the N users, a target user in the N users, where action information of the target user in the first image is the same as the preset action information; and displaying content bound with the target user according to the action information of the target user in the first image.

Abstract: The present disclosure provides an image sensor including a substrate (400) and at least one pixel unit. The pixel unit comprises a photodetector (401) arranged in the substrate, a photosensitive surface of the photodetector facing a back surface of the substrate to generate a charge upon receiving an incident light from the back surface of the substrate, a spherical crown structure (406) arranged on the substrate and located on an opposite surface of the photosensitive surface, a conformal dielectric layer (420) arranged on the spherical crown structure and used to generate a dielectric-layer reflective light when the incident light reaches the conformal dielectric layer, and a reflective layer (430) arranged on the conformal dielectric layer and used to generate a reflective-layer reflective light when the incident light reaches the reflective layer. In this way, an absorption ratio for the incident light is increased, thereby improving signal quality of an image.

Abstract: A PUF device and a method of outputting a random sequence are disclosed. The PUF device includes: at least one processing unit and at least one PUF unit, and a first PUF unit of the at least one PUF unit includes a first MOS transistor and a second MOS transistor, two sources of the two MOS transistors are connected to a same input voltage; two gates of the two MOS transistors are floating; and two drains of the two MOS transistors are respectively connected with a first processing unit, and the first processing unit is configured to: output a first random value corresponding to the first PUF unit according to a difference between two results output by the two drains of the two MOS transistors, when the input voltage is greater than or equal to a preset voltage.

Abstract: A memory cell, a memory device and an operation method of a memory cell are provided. The memory cell includes: an anti-fuse transistor including a gate, a source and a drain, the anti-fuse transistor being formed by a Metal-Oxide-Semiconductor Field-Effect Transistor; and a gate tube, electrically connected to the gate of the anti-fuse transistor, where the gate and the source respectively forming two ends of a first anti-fuse capacitor, and the gate and the drain respectively form two ends of a second anti-fuse capacitor. Thus the area of the anti-fuse structure can be reduced, and the memory capacity of the memory cell can be improved.

Abstract: A PUF device and a method of outputting a random sequence are disclosed. The PUF device includes: at least one processing unit and at least one PUF unit, and a first PUF unit of the at least one PUF unit includes a first MOS transistor and a second MOS transistor, two sources of the two MOS transistors are connected to a same input voltage; two gates of the two MOS transistors are floating; and two drains of the two MOS transistors are respectively connected with a first processing unit, and the first processing unit is configured to: output a first random value corresponding to the first PUF unit according to a difference between two results output by the two drains of the two MOS transistors, when the input voltage is greater than or equal to a preset voltage.