Abstract: The present invention provides an apparatus and method for automatic generation and update of a knowledge graph from multi-modal sources. The apparatus comprises a conversation parsing module configured for updating a dynamic information word set VD with labelled words generated from extracted from the multi-modal sources; updating a static information word set VS based on extracted schema of relations extracted from the multi-modal sources; and generating pairs of question and answer based on the dynamic information word set VD, the static information word set VS and the one or more sentence patterns; and a knowledge graph container configured for updating a knowledge graph based on the extracted entities of interest and schema of relations. Therefore, an efficient and cost-effective way for question decomposition, query chain construction and entity association from unstructured data is achieved.

Abstract: The present invention provides an apparatus and method for automatic generation and update of a knowledge graph from multi-modal sources. The apparatus comprises a conversation parsing module configured for updating a dynamic information word set VD with labelled words generated from extracted from the multi-modal sources; updating a static information word set VS based on extracted schema of relations extracted from the multi-modal sources; and generating pairs of question and answer based on the dynamic information word set VD, the static information word set VS and the one or more sentence patterns; and a knowledge graph container configured for updating a knowledge graph based on the extracted entities of interest and schema of relations. Therefore, an efficient and cost-effective way for question decomposition, query chain construction and entity association from unstructured data is achieved.

Abstract: An integrated circuit modeling method 100 implementable on computer, which has an executable software model 145 having modules 140 of reusable functional cores 105 coded in a high level language and a virtual platform of the integrated circuit employable in an architecture exploration step 115. A modeling library of modules coded in high level languages and hardware level languages are provided and instantiated according to user input in a functional verification step 120 having a co-simulation environment, with interface code 170 between modules automatically generated by an interface generator 130 based on a two dimensional data array of hardware specification inputs 205, the interface code 170 further interfacing with wrappers engaged between high and hardware level language modules.

Abstract: An integrated circuit modeling method 100 implementable on computer, which has an executable software model 145 having modules 140 of reusable functional cores 105 coded in a high level language and a virtual platform of the integrated circuit employable in an architecture exploration step 115. A modeling library of modules coded in high level languages and hardware level languages are provided and instantiated according to user input in a functional verification step 120 having a co-simulation environment, with interface code 170 between modules automatically generated by an interface generator 130 based on a two dimensional data array of hardware specification inputs 205, the interface code 170 further interfacing with wrappers engaged between high and hardware level language modules.