Patents by Inventor Yuqian PANG

Yuqian PANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135879
    Abstract: A display substrate and a display apparatus are provided, and the display substrate includes a pixel circuit with a light emitting module configured to emit light; a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage; a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage; a first transistor, having a first electrode coupled to a position from which the driving module acquires the driving voltage; a second transistor, having a first electrode coupled to the first electrode of the first transistor, and a second electrode being not directly coupled to a signal source; and a voltage stabilizing capacitor, having a first electrode coupled to the second electrode of the second transistor, and a second electrode coupled to a constant voltage signal source.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Jingwen ZHANG, Yunsheng XIAO, Miao WANG, Yuqian PANG
  • Patent number: 11929030
    Abstract: A display panel, a driving method, and a display device. The display panel includes: a base substrate, subpixels, driving lines, data lines, a gate driving circuit including clock signal lines and shift register units arranged in extension direction of clock signal lines. The clock signal lines is divided into clock signal line groups; the shift register units is divided into register unit groups; the shift register units in same register unit group are cascaded, adjacent two of shift register units in the extension direction are in different register unit groups; one register unit group corresponds to one clock signal line group; the gate of an input transistor is connected to a clock signal line in a corresponding clock signal line group, the second pole of input transistor is connected to the gate of an output transistor; the second pole of output transistor is connected to at least one driving line.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: March 12, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yuqian Pang, Yunsheng Xiao, Haigang Qing, Miao Wang, Tiaomei Zhang, Mengqi Wang
  • Patent number: 11900874
    Abstract: The pixel circuit of the present disclosure includes: a light emitting module configured to emit light; a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage; a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage; a first transistor, having a first electrode coupled to a position from which the driving module acquires the driving voltage; a second transistor, having a first electrode coupled to the first electrode of the first transistor, and a second electrode being not directly coupled to a signal source; and a voltage stabilizing capacitor, having a first electrode coupled to the second electrode of the second transistor, and a second electrode coupled to a constant voltage signal source.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: February 13, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jingwen Zhang, Yunsheng Xiao, Miao Wang, Yuqian Pang
  • Patent number: 11657756
    Abstract: The present disclosure discloses a display panel and a display apparatus. The display panel includes a display region and a non-display region surrounding the display region. The display region includes: a plurality of sub-pixels disposed in an array, and each sub-pixel includes a pixel circuit and a light emitting device. A control terminal of anode reset transistor is electrically connected with a control terminal of reset transistors in the next row of sub-pixels. The non-display region includes: a row of dummy sub-pixels, the dummy sub-pixels correspond to columns of sub-pixels in one to one correspondence, each dummy sub-pixel includes a dummy pixel circuit and a dummy light emitting device, and the dummy light emitting device does not emit light. and a control terminal of the dummy anode reset transistor is electrically connected with a control terminal of reset transistor in a first row of sub-pixels correspondingly.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 23, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Miao Wang, Yunsheng Xiao, Yuqian Pang
  • Publication number: 20230093830
    Abstract: The pixel circuit of the present disclosure includes: a light emitting module configured to emit light; a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage; a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage; a first transistor, having a first electrode coupled to a position from which the driving module acquires the driving voltage; a second transistor, having a first electrode coupled to the first electrode of the first transistor, and a second electrode being not directly coupled to a signal source; and a voltage stabilizing capacitor, having a first electrode coupled to the second electrode of the second transistor, and a second electrode coupled to a constant voltage signal source.
    Type: Application
    Filed: November 27, 2020
    Publication date: March 30, 2023
    Inventors: Jingwen ZHANG, Yunsheng XIAO, Miao WANG, Yuqian PANG
  • Publication number: 20220406260
    Abstract: A display panel, a driving method, and a display device. The display panel includes: a base substrate, subpixels, driving lines, data lines, a gate driving circuit including clock signal lines and shift register units arranged in extension direction of clock signal lines. The clock signal lines is divided into clock signal line groups; the shift register units is divided into register unit groups; the shift register units in same register unit group are cascaded, adjacent two of shift register units in the extension direction are in different register unit groups; one register unit group corresponds to one clock signal line group; the gate of an input transistor is connected to a clock signal line in a corresponding clock signal line group, the second pole of input transistor is connected to the gate of an output transistor; the second pole of output transistor is connected to at least one driving line.
    Type: Application
    Filed: April 28, 2020
    Publication date: December 22, 2022
    Inventors: Yuqian PANG, Yunsheng XIAO, Haigang QING, Miao WANG, Tiaomei ZHANG, Mengqi WANG
  • Publication number: 20220352297
    Abstract: The present disclosure relates to a display substrate, including: a substrate including a display region and a peripheral region surrounding the display region, the peripheral region including a first wiring region, the first wiring region including a first sub-wiring region disposed along a first direction away from the display region; a first conductive layer located on the substrate; a first dielectric layer located on the first conductive layer; a second conductive layer located on the first dielectric layer; a second dielectric layer located on the second conductive layer; a third conductive layer located on the second dielectric layer; a third dielectric layer as a planarization layer located on the third conductive layer; a fourth conductive layer located on the third dielectric layer. The fourth wiring is electrically connected to the third wiring.
    Type: Application
    Filed: December 9, 2020
    Publication date: November 3, 2022
    Inventors: Yuqian PANG, Miao WANG, Yunsheng XIAO
  • Publication number: 20220328595
    Abstract: A display substrate and a display substrate are provided. The display substrate includes a first signal line, and the first signal line includes a first signal line portion in the display region and a second signal line portion in the peripheral region. The second signal line portion of the first signal line includes a first sub-portion, a second sub-portion and a third sub-portion which are sequentially connected; the first sub-portion and the third sub-portion both include a curved structure, and the second sub-portion is in a linear structure; and the display substrate further includes a first compensation electrode in the peripheral region, and the first compensation electrode is overlapped with the second sub-portion of the second signal line portion of the first signal line in a direction perpendicular to the base substrate to form a compensation capacitor.
    Type: Application
    Filed: August 3, 2020
    Publication date: October 13, 2022
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Gen LI, Huijuan YANG, Tiaomei ZHANG, Yuqian PANG, Jingwen ZHANG
  • Publication number: 20220319408
    Abstract: The present disclosure discloses a display panel and a display apparatus. The display panel includes a display region and a non-display region surrounding the display region. The display region includes: a plurality of sub-pixels disposed in an array, and each sub-pixel includes a pixel circuit and a light emitting device. A control terminal of anode reset transistor is electrically connected with a control terminal of reset transistors in the next row of sub-pixels. The non-display region includes: a row of dummy sub-pixels, the dummy sub-pixels correspond to columns of sub-pixels in one to one correspondence, each dummy sub-pixel includes a dummy pixel circuit and a dummy light emitting device, and the dummy light emitting device does not emit light. and a control terminal of the dummy anode reset transistor is electrically connected with a control terminal of reset transistor in a first row of sub-pixels correspondingly.
    Type: Application
    Filed: October 23, 2020
    Publication date: October 6, 2022
    Inventors: Miao WANG, Yunsheng XIAO, Yuqian PANG
  • Publication number: 20220310748
    Abstract: A display substrate and a display substrate are provided. The display substrate includes a voltage bus line in the peripheral region, the voltage bus line at least partially surrounds the transparent region, and is configured to be connected with sub-pixels in a plurality of first pixel rows to provide a first voltage; the display substrate further includes a plurality of first signal lines extended along the first direction, and each first signal line includes a first signal line portion in the display region and a second signal line portion, which is electrically connected with the first signal line portion, in the peripheral region, and the second signal line portion includes a bent portion extended along the transparent region, bent portions of second signal line portions of the plurality of first signal lines are all located at a side of the voltage bus line close to the transparent region.
    Type: Application
    Filed: August 3, 2020
    Publication date: September 29, 2022
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Gen LI, Huijuan YANG, Pinchao GU, Yuqian PANG, Jingwen ZHANG
  • Publication number: 20220262882
    Abstract: Provided is a display substrate, including a base substrate and a plurality of pixel units arranged on the base substrate; each pixel unit includes constant voltage terminals and a dual-gate transistor; a part of an active region of each dual-gate transistor, which is located between two gates, is an intermediate part; except the pixel units closest to the first side, each pixel unit includes a compensation structure; the compensation structure is connected to one of the constant voltage terminals of the pixel unit where the compensation structure is located, and compensates for at least one dual-gate transistor of a pixel unit adjacent to the pixel unit where the compensation structure is located in a direction toward the first side; the compensation structure overlaps and is insulated from the intermediate part of the dual-gate transistor for which the compensation structure compensates.
    Type: Application
    Filed: March 9, 2021
    Publication date: August 18, 2022
    Inventors: Yonglin GUO, Hongmei FAN, Xinyu WEI, Yuqian PANG, Kai ZHANG