Patents by Inventor Yuri Otobe

Yuri Otobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770400
    Abstract: A semiconductor module includes a substrate, two bare chips (semiconductor elements) mounted on the substrate, and a case fixed to the substrate. A conductor pattern and five signal patterns are provided for each bare chip on an upper surface of an insulating substrate. Signal electrodes and the signal patterns of the bare chips are connected to by conductive plates. An insulating member is provided on connecting portions of the conductive plates.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: September 8, 2020
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Naoki Kato, Shogo Mori, Harumitsu Sato, Hiroki Watanabe, Hiroshi Yuguchi, Yuri Otobe
  • Publication number: 20190172788
    Abstract: A semiconductor module includes a substrate, two bare chips (semiconductor elements) mounted on the substrate, and a case fixed to the substrate. A conductor pattern and five signal patterns are provided for each bare chip on an upper surface of an insulating substrate. Signal electrodes and the signal patterns of the bare chips are connected to by conductive plates. An insulating member is provided on connecting portions of the conductive plates.
    Type: Application
    Filed: May 12, 2017
    Publication date: June 6, 2019
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Naoki KATO, Shogo MORI, Harumitsu SATO, Hiroki WATANABE, Hiroshi YUGUCHI, Yuri OTOBE
  • Patent number: 10085368
    Abstract: An electronic device includes a heat dissipation member, a power element that is thermally coupled to the heat dissipation member, and a first conductive layer to which the power element is electrically coupled. The electronic device further includes a control element that controls a switching operation of the power element, a second conductive layer to which the control element is electrically coupled, and a resin layer arranged between the first conductive layer and the second conductive layer. The power element is embedded in the resin layer. The first conductive layer, the resin layer, and the second conductive layer are stacked on the heat dissipation member in this order from the ones closer to the heat dissipation member.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: September 25, 2018
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo Mori, Naoki Kato, Hiroshi Yuguchi, Yoshitaka Iwata, Masahiko Kawabe, Yuri Otobe
  • Publication number: 20180191220
    Abstract: A motor-driven compressor includes a compressor unit, a motor unit including a motor, and an inverter unit that drives the motor. The compressor unit, the motor unit, and the inverter unit are lined up in an axial direction of the motor. The motor-driven compressor further includes a housing that accommodates the compressor unit and the motor unit. The inverter unit includes an inverter module. The inverter module includes U-phase, V-phase, and W-phase semiconductor elements that respectively configure U-phase, V-phase, and W-phase arms and a substrate on which the semiconductor elements are bare-chip-mounted. The substrate includes a heat dissipation surface that is thermally connected to the housing. The semiconductor elements are arranged along a contour of the housing.
    Type: Application
    Filed: June 23, 2016
    Publication date: July 5, 2018
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Naoki KATO, Shogo MORI, Yuri OTOBE, Hiroshi YUGUCHI, Yusuke KINOSHITA
  • Publication number: 20170280595
    Abstract: An electronic device includes a heat dissipation member, a power element that is thermally coupled to the heat dissipation member, and a first conductive layer to which the power element is electrically coupled. The electronic device further includes a control element that controls a switching operation of the power element, a second conductive layer to which the control element is electrically coupled, and a resin layer arranged between the first conductive layer and the second conductive layer. The power element is embedded in the resin layer. The first conductive layer, the resin layer, and the second conductive layer are stacked on the heat dissipation member in this order from the ones closer to the heat dissipation member.
    Type: Application
    Filed: November 6, 2015
    Publication date: September 28, 2017
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Naoki KATO, Hiroshi YUGUCHI, Yoshitaka IWATA, Masahiko KAWABE, Yuri OTOBE
  • Patent number: 9171771
    Abstract: A semiconductor unit includes a cooler having a fluid flow space, an insulating substrate bonded to the cooler through a metal, a semiconductor device soldered to the insulating substrate, an intermediate member interposed between the insulating substrate and the fluid flow space and having a first surface where the insulating substrate is mounted, and a mold resin having a lower coefficient of liner expansion than the intermediate member. The insulating substrate, the semiconductor device and the cooler are molded by the mold resin. The intermediate member has a second surface that extends upward or downward relative to the first surface. The first surface is covered by the mold resin. The second surface is covered by a resin cover.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 27, 2015
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shinsuke Nishi, Shogo Mori, Yuri Otobe, Naoki Kato
  • Publication number: 20150187686
    Abstract: There is provided a semiconductor device that includes a circuit board, a semiconductor element mounted to the circuit board, a control signal terminal disposed on the opposite side of the semiconductor element from the circuit board, and a bonding wire connecting the semiconductor element and the control signal terminal.
    Type: Application
    Filed: December 19, 2014
    Publication date: July 2, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Shinsuke NISHI
  • Publication number: 20150176877
    Abstract: There is provided a motor-driven compressor including a semiconductor device that comprises a compression mechanism, a motor, a housing, a wall, an electronic component, and a resin member. The motor drives the compression mechanism. The housing accommodates therein the compression mechanism and the motor. The wall extends from an outer surface of the housing so as to surround a part thereof and have an opened end and cooperates with the outer surface of the housing to form a casing. The electronic component is accommodated in the casing and includes a semiconductor module that includes a circuit board connected to the outer surface of the housing and a semiconductor element mounted to the circuit board. The resin member seals an entirety of the electronic component in the casing.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 25, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Shinsuke NISHI
  • Publication number: 20150137344
    Abstract: A semiconductor device has a circuit board including an insulation layer, a wiring layer formed on one surface of the insulation layer, and a buffer layer formed on the other surface of the insulation layer, a semiconductor element bonded to the wiring layer, a radiator member bonded to the buffer layer of the circuit board, and a resin member to seal the semiconductor element and an entire surface of the circuit board including an outer peripheral surface of the buffer layer in the circuit board. A method for manufacturing the semiconductor device includes bonding the buffer layer of the circuit board to the radiator member, bonding the semiconductor element to the wiring layer of the circuit board, and sealing the semiconductor element and an entire surface of the circuit board including an outer peripheral surface of the buffer layer in the circuit board with resin after the two bonding steps.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 21, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Shinsuke NISHI
  • Publication number: 20150122465
    Abstract: A refrigerant inlet header 30 is in communication with a cooling unit 20 in a longitudinal lateral surface 20C of the refrigerant inlet header 30. Cooling fluid is flowed into the cooling unit 20 through the part where the refrigerant inlet header 30 is in communication with the cooling unit 20. A refrigerant outlet header 40 is in communication with the cooling unit 20 in a longitudinal lateral surface 20D of the refrigerant outlet header 40. Cooling fluid is flowed out through the part where the refrigerant outlet header 40 is in communication with the cooling unit 20. In a passage of the cooling unit 20 for cooling fluid, a plurality of pin fins 25 is disposed in a stagger arrangement along the longitudinal direction of the refrigerant inlet and outlet headers 30 and 40.
    Type: Application
    Filed: October 27, 2014
    Publication date: May 7, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Shinsuke NISHI
  • Patent number: 8933553
    Abstract: A semiconductor unit includes a first conductive layer, a second conductive layer electrically insulated from the first conductive layer, a first semiconductor device mounted on the first conductive layer, a second semiconductor device mounted on the second conductive layer, a first bus bar for electrical connection of the second semiconductor device to the first conductive layer, and a second bus bar for electrical connection of the first semiconductor device to one of the positive and negative terminals of a battery. The first bus bar is disposed in overlapping relation to the second bus bar in such a manner that mold resin fills between the first bus bar and the second bus bar.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: January 13, 2015
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Shinsuke Nishi, Shogo Mori, Yuri Otobe, Naoki Kato
  • Patent number: 8916960
    Abstract: A semiconductor unit includes a base having a surface where a first insulation layer is disposed, a second insulation layer spaced apart from the first insulation layer to form a region therebetween and disposed parallel to the surface of the base where the first insulation layer is disposed, a single conductive layer disposed across the first insulation layer and the second insulation layer, and a semiconductor device bonded to the conductive layer.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Shinsuke Nishi, Shogo Mori, Yuri Otobe, Naoki Kato
  • Patent number: 8836103
    Abstract: A semiconductor unit includes an insulation layer, a conductive layer bonded to one side of the insulation layer, a semiconductor device mounted on the conductive layer, a cooler thermally coupled to the other side of the insulation layer, a first bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the first bus bar other than the bonding surface, and a second bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the second bus bar other than the bonding surface. The second bus bar has a greater ratio of the area of the bonding surface to the area of the non-bonding surface than the first bus bar. The second bus bar has a lower electric resistance than the first bus bar.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Shinsuke Nishi, Shogo Mori, Yuri Otobe, Naoki Kato
  • Publication number: 20140117508
    Abstract: A semiconductor unit includes an insulating substrate having a first surface and a second surface opposite to the first surface, a first conductive layer bonded to the first surface of the insulating substrate, a second conductive layer bonded to the first surface of the insulating substrate at a position different from that for the first conductive layer, a stress relief layer bonded to the second surface of the insulating substrate, a radiator bonded to the stress relief layer on the side thereof opposite to the insulating substrate, and semiconductor devices electrically bonded to the respective first and second conductive layers. The insulating substrate has a low-rigidity portion provided between the first and second conductive layers and having a lower rigidity than the rest of the insulating substrate, and at least the low-rigidity portion is sealed and covered by a mold resin.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shinsuke NISHI, Shogo MORI, Yuri OTOBE, Naoki KATO
  • Publication number: 20140091444
    Abstract: A semiconductor unit includes a base, an insulating substrate bonded to the base, a conductive plate made of a metal of poor solderability, a semiconductor device mounted to the insulating substrate through the conductive plate, and a metal plate interposed between the conductive plate and the semiconductor device and made of a metal of good solderability as compared to the metal used for the conductive plate. The base, the insulating substrate, the conductive plate and the metal plate are brazed together, and the semiconductor device is soldered to the metal plate.
    Type: Application
    Filed: September 20, 2013
    Publication date: April 3, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Naoki KATO, Shinsuke NISHI
  • Publication number: 20140090809
    Abstract: A cooling device to which a heating element is joinable includes a base, a plurality of first groups of pin fins and a plurality of second groups of pin fins. The second groups and the first groups are arranged alternately in a flow direction in which a cooling medium flows through a passage of the base. A second outermost pin fin of each second group is more distant from a side surface of the base than a first outermost pin fin of each first group. Width between a side surface of the second outermost pin fin of each second group and the side surface of the base is the same as or larger than width between a side surface of the pin fin of each first group that is adjacent to the first outermost pin fin of the first group and the side surface of the second outermost pin fin.
    Type: Application
    Filed: September 24, 2013
    Publication date: April 3, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Naoki KATO, Shinsuke NISHI
  • Publication number: 20140091453
    Abstract: A cooling device includes a base and a plurality of radiator fins. The base includes an exterior, an interior, an inlet, and an outlet. A heat generation element is connected to the exterior of the base. The radiator fins are located near the heat generation element in the interior of the base. The radiator fins are arranged from the inlet to the outlet. Each radiator fin has a sidewise cross-section with a dimension in a flow direction of the cooling medium and a dimension in a lateral direction orthogonal to the flow direction of the cooling medium. The dimension in the flow direction is longer than the dimension in the lateral direction. The radiator fins are separated from one another by a predetermined distance in the lateral direction.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 3, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shogo MORI, Yuri OTOBE, Naoki KATO, Shinsuke NISHI, Tomoya HIRANO, Seiji MATSUSHIMA
  • Publication number: 20140035120
    Abstract: A semiconductor unit includes an insulation layer, a conductive layer bonded to one side of the insulation layer, a semiconductor device mounted on the conductive layer, a cooler thermally coupled to the other side of the insulation layer, a first bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the first bus bar other than the bonding surface, and a second bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the second bus bar other than the bonding surface. The second bus bar has a greater ratio of the area of the bonding surface to the area of the non-bonding surface than the first bus bar. The second bus bar has a lower electric resistance than the first bus bar.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 6, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shinsuke NISHI, Shogo MORI, Yuri OTOBE, Naoki KATO
  • Publication number: 20140008781
    Abstract: A semiconductor unit includes a first conductive layer, a second conductive layer electrically insulated from the first conductive layer, a first semiconductor device mounted on the first conductive layer, a second semiconductor device mounted on the second conductive layer, a first bus bar for electrical connection of the second semiconductor device to the first conductive layer, and a second bus bar for electrical connection of the first semiconductor device to one of the positive and negative terminals of a battery. The first bus bar is disposed in overlapping relation to the second bus bar in such a manner that mold resin fills between the first bus bar and the second bus bar.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Inventors: Shinsuke NISHI, Shogo MORI, Yuri OTOBE, Naoki KATO
  • Publication number: 20140008782
    Abstract: A semiconductor unit includes a base having a surface where a first insulation layer is disposed, a second insulation layer spaced apart from the first insulation layer to form a region therebetween and disposed parallel to the surface of the base where the first insulation layer is disposed, a single conductive layer disposed across the first insulation layer and the second insulation layer, and a semiconductor device bonded to the conductive layer.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Inventors: Shinsuke NISHI, Shogo MORI, Yuri OTOBE, Naoki KATO