Abstract: A verification method for an application logic provided with one or more macro logics configured to perform a predetermined operation, a macro operation control unit configured to instruct the one or more macro logics to start the operation to cause the one or more macro logics to perform the operation, and an operation data storage area configured to store data. In the application logic, static verification by property description of a formal verification language is performed for each of the one or more macro logic, the macro operation control unit, and the operation data storage area, and dynamic verification by simulation is further performed for at least one of the one or more macro logics.

Abstract: In an electrochemical imaging method of, by applying voltages between working electrodes arranged in a measurement area and a counter electrode and causing the working electrodes to perform a redox reaction by giving and reception of electrons to and from a plurality of measurement target substances generated or consumed by a sample in an electrolytic solution to measure currents that flow through the individual electrodes, imaging images of density distributions of the measurement target substances based on distributions of the currents in the measurement area, the working electrodes are arranged in the measurement area in a manner of being arranged uniformly in each of a plurality of working electrode groups, each of the working electrode groups comprising a plurality of working electrodes, and in a manner of being mutually mixed; applied voltages specified for the working electrode groups, respectively, are simultaneously applied between the working electrodes and the counter electrode; any two working ele

Abstract: The present invention includes a drawing data generating unit, a variation pattern that varies at regular intervals to be displayed, a display unit that displays drawing data, and a comparator that compares whether input signals are coincident, and the drawing data generating unit includes a receiver that receives data from a higher-level device, a drawing control unit that converts the data received from the higher-level device to drawing data, and a drawing memory that stores the drawing data. The drawing data generating unit and the variation pattern are redundantly configured, and the variation pattern is input to the drawing data generating unit. One output signal of the drawing data generating unit regarding drawing data including the variation pattern is transmitted to the display unit, a plurality of output signals from the drawing data generating unit are input to the comparator, and the comparator outputs a comparison result as a detection signal outside.

Abstract: An object of the present invention is to provide a high reliable/high safe programmable logic device with high error resistance. The present invention provides a programmable logic device that has a plurality of configuration memories. The configuration memories are divided into a plurality of areas and are arranged and a part of the plurality of areas is set to a high reliable area where reliability of the configuration memory is higher than in the other area.

Abstract: An X-ray diagnosis apparatus detects X-rays output from an X-ray source and transmitted through a subject, and generates images of the inside of the subject, and comprises a detector, an X-ray intensity distribution data generator, and an entrance dose distribution data generator. The detector detects the intensity of the X-rays output from the X-ray source. The X-ray intensity distribution data generator generates X-ray intensity distribution data showing the X-ray intensity for each of a plurality of subdomains of an X-ray irradiation field from the X-ray source based on the detection outcome by the detector. The entrance dose distribution data generator generates entrance dose distribution data showing the dose of X-rays output from the X-ray source and irradiated onto the subject, based on the X-ray intensity distribution data.

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract: The present invention aims to provide a programmable device with a configuration memory that can hold the state of the occurrence abnormal situation that is difficult to assume such as a failure occurring in the programmable device due to the terrestrial radiation of the configuration memory, even during power off, in order to improve the reproducibility in device testing based on the held error information. The programmable device with the configuration memory includes: an error detection section for detecting an error in the configuration memory, and outputting the detected error as well as an address in which the error occurred, as error information; and an error information holding section provided with a non-volatile memory to store the output error information.

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract: Provided is a semiconductor device capable of reducing a penalty associated with ensuring reliability. The semiconductor device includes a latch circuit which has input/output paths of three systems or more independent from each other. The latch circuit includes a plurality of storage elements STE1 to STE3 which are provided on the input/output paths of the three systems or more, respectively, and hold input data in synchronization with a clock signal. At least one storage element (for example, STE1) of the plurality of storage elements STE1 to STE3 includes a majority decision unit (for example, 81a) executing a majority decision using data from the storage elements provided on other input/output paths different from the input/output path thereof and outputs data in which a result of the majority decision is reflected.

Abstract: An object of the present invention is to provide a high reliable/high safe programmable logic device with high error resistance. The present invention provides a programmable logic device that has a plurality of configuration memories. The configuration memories are divided into a plurality of areas and are arranged and a part of the plurality of areas is set to a high reliable area where reliability for a failure of the configuration memory is higher than reliability in the other area.

Abstract: In a device including a programmable circuit, the programmable circuit is connected to a non-volatile memory in which configuration information is stored, and another memory having a faster reading speed than the non-volatile memory, and the programmable circuit includes a configuration memory control circuit, and a signal line group for performing reading with respect to the other memory such as a volatile memory and an embedded memory from the non-volatile memory by the configuration memory control circuit, and copies a part of circuit configuration information which is required to be subjected to fast restoration from failure into the other memory.

Abstract: Roll paper for printing maintains high bending resistance at the perforations without impairing the ease of separation at the perforation. The paper has perforations 15A, 25A formed across the width of the paper at a specific interval lengthwise, and the perforation 15A, 25A have either a sawtooth shape or a wave shape. The roll paper also has a liner 11, and a plurality of labels 12 affixed by adhesive 13 at an even interval along the length of the liner 11. The perforation 15A, 25A are formed in the liner 11 between two adjacent labels 12.

Abstract: An X-ray diagnostic apparatus includes a display, a holding device, bed device, a gesture detecting device and a processing circuitry. The holding device includes an X-ray irradiator, an X-ray detector, and a supporter that supports the X-ray irradiator and the X-ray detector. The bed device is available to place an object on. The gesture detecting device recognizes a gesture of a person. The processing circuitry identifies a state of the X-ray diagnostic apparatus based on at least one of the display, the X-ray irradiator, the X-ray detector, the holding device and the bed device, determines an operation detail based on a combination of the identified state and the recognized gesture, and operates at least one of the display, the holding device, the bed device, a speaker and a room light according to the determined operation detail.

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract: According to one embodiment, a gesture detection supporting system for an X-ray diagnosis includes memory circuitry, a sensor, processing circuitry and an attaching instrument. The memory circuitry stores an operation content of an X-ray diagnostic apparatus. The operation content is related to a gesture by a user. The sensor senses a gesture. The processing circuitry detects the gesture, based on an output from the sensor; acquire the operation content of the X-ray diagnostic apparatus, from the memory circuitry, based on a detection result of the gesture; and output operation information to the X-ray diagnostic apparatus, based on the operation content. The attaching instrument attaches the sensor to a ceiling of an examination room, an arm for driving an X-ray tube and an X-ray detector, an intravenous drip stand, an injector of a contrast agent, an X-ray protective board and/or a display for displaying an X-ray image.

Abstract: In a device including a programmable circuit, the programmable circuit is connected to a non-volatile memory in which configuration information is stored, and another memory having a faster reading speed than the non-volatile memory, and the programmable circuit includes a configuration memory control circuit, and a signal line group for performing reading with respect to the other memory such as a volatile memory and an embedded memory from the non-volatile memory by the configuration memory control circuit, and copies a part of circuit configuration information which is required to be subjected to fast restoration from failure into the other memory.

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract: A semiconductor integrated circuit device that detects an operation error of an SRAM caused by a device variation fluctuating with time is provided. In the SRAM, a memory cell has a transfer MOS transistor whose gate is connected to a word line. At the time of a write test of the memory cell, a control circuit including a test/normal operation selection circuit and a word line driver circuit applies a third voltage to the word line in a preparation period before writing test data, thereafter a first voltage to the word line, and a second voltage to the word line at the end of writing. Due to this, the threshold voltage of the transfer MOS transistor, which fluctuates with time, can be controlled. Therefore, it is possible to enhance detection efficiency for a malfunctioning cell of the SRAM due to a temporal variation.

Abstract: A semiconductor integrated circuit device provided with a first circuit block BLK1, a second circuit block DRV1 and a conversion circuit MIO1 for connecting the first circuit block to the second circuit block. The first circuit block includes a first mode for applying a supply voltage and a second mode for shutting off the supply voltage. The conversion circuit is provided with a function for maintaining the potential of an input node of the second circuit block at an operation potential, thereby suppressing a penetrating current flow when the first circuit block is in the second mode. The conversion circuit (MIO1 to MIO4) are commonly used for connecting circuit blocks.

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.