Patents by Inventor Yusuke KOUMURA

Yusuke KOUMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179987
    Abstract: A display apparatus with a driver circuit having redundancy is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a first driver circuit and a second driver circuit. The second layer includes a first pixel region and a second pixel region. The first pixel region includes a first pixel circuit and the second pixel region includes a second pixel circuit. The first pixel region includes a region overlapping with the first circuit and the second pixel region includes a region overlapping with the second circuit. The first pixel circuit is electrically connected to the first driver circuit through a first wiring, the second pixel circuit is electrically connected to the second driver circuit through a second wiring, and the first wiring is electrically connected to the second wiring through a switch.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 30, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minato ITO, Munehiro KOZUMA, Yuki OKAMOTO, Yusuke KOUMURA
  • Publication number: 20240161695
    Abstract: A display apparatus with a novel structure is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a driver circuit region, and the second layer includes a pixel array. The pixel array includes a plurality of pixel regions. The driver circuit region includes a control circuit unit and a plurality of local driver circuits. One of the plurality of local driver circuits corresponds to any one of the plurality of pixel regions. The local driver circuit has a function of outputting a driving signal for driving a plurality of pixels included in the corresponding pixel region.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 16, 2024
    Inventors: Minato ITO, Takanori MATSUZAKI, Munehiro KOZUMA, Yuki OKAMOTO, Yusuke KOUMURA
  • Publication number: 20230145777
    Abstract: A position estimation system with low power consumption is provided. The position estimation system includes a comparison unit, a learning unit, a data acquisition unit, an inference unit, a data conversion unit, and an evaluation unit. The comparison unit has a function of calculating a first parallel movement amount and a first rotation amount on the basis of machine learning data representing geographic information. The learning unit has a function of generating a machine learning model through learning using the machine learning data, the first parallel movement amount, and the first rotation amount. The data acquisition unit has a function of acquiring acquisition data representing environmental information on the vicinity of a position estimation device. The inference unit has a function of inferring a second parallel movement amount and a second rotation amount, with use of the machine learning model, on the basis of the acquisition data and the machine learning data.
    Type: Application
    Filed: March 29, 2021
    Publication date: May 11, 2023
    Inventors: Teppei OGUNI, Yusuke KOUMURA
  • Publication number: 20230066071
    Abstract: A novel image correction system is provided. The image correction system includes an imaging device, a first arithmetic device, a display portion including a plurality of pixels, and a second arithmetic device. The imaging device obtains imaging data by capturing a first-gray-level image displayed on the display portion. The first arithmetic device calculates the luminous intensity of each of the pixels and a correction standard by using the imaging data. The first arithmetic device calculates correction data for each of the pixels by using the luminous intensity and the correction standard. The second arithmetic device corrects a video signal by using the correction data. The display portion displays an image using the corrected video signal. The first arithmetic device calculates correction data for pixels that emit red light, pixels that emit green light, and pixels that emit blue light and modifies the correction data by using color temperature data.
    Type: Application
    Filed: August 24, 2022
    Publication date: March 2, 2023
    Inventors: Yusuke KOUMURA, Yuki OKAMOTO, Toshiki MIZUGUCHI, Tatsuya ONUKI, Hideki UOCHI
  • Publication number: 20230044180
    Abstract: The driving assistance system includes an imaging device capable of capturing a first monochrome image in a vehicle traveling direction, a first neural network for segmentation processing, a second neural network for depth estimation processing, a determination portion determining a center of a portion cut off from the first monochrome image on the basis of the segmentation processing and the depth estimation processing, a third neural network for colorization processing of only a second cut-off monochrome image, and a display device for enlargement of the second monochrome image subjected to the colorization processing.
    Type: Application
    Filed: January 6, 2021
    Publication date: February 9, 2023
    Inventors: Kengo AKIMOTO, Koki INOUE, Yusuke KOUMURA
  • Publication number: 20230024698
    Abstract: A neural network model that can perform highly accurate processing on input data is provided. The neural network model includes first and second neutral networks, and the first neural network includes a first layer, a second layer, and a third layer. A feature map output from the first layer is input to the second layer and the second neural network, and a feature map output from the second neural network is input to the third layer. Given that the feature map output from the first layer when first data is input to the first neural network is a correct feature map and that the feature map output from the first layer when second data obtained by adding noise to the first data is input to the first neural network is a learning feature map, the second neural network is learned so that a feature map output from the second neural network matches the correct feature map when the learning feature map is input.
    Type: Application
    Filed: December 14, 2020
    Publication date: January 26, 2023
    Inventors: Yusuke KOUMURA, Koki INOUE, Fumiya NAGASHIMA
  • Publication number: 20230004704
    Abstract: The circuit layout generation system includes a memory portion, a limitation data arithmetic portion, and a layout data arithmetic portion. The memory portion is configured to store circuit connection data and first limitation data. The circuit connection data is data regarding connection of a transistor and a capacitor included in a pixel circuit. The first limitation data includes data that determines a wiring interval of the transistor and a wiring interval of the capacitor and data that determines placement coordinates of the transistor and the capacitor. The limitation data arithmetic portion is configured to generate second limitation data on the basis of the circuit connection data and the first limitation data and store the second limitation data in the memory portion. The second limitation data is data that determines the placement of the transistor and the capacitor designated by the placement coordinates so that the transistor and the capacitor are positioned close to each other.
    Type: Application
    Filed: June 22, 2022
    Publication date: January 5, 2023
    Inventors: Munehiro KOZUMA, Minato ITO, Yusuke KOUMURA, Tatsuya ONUKI
  • Publication number: 20220366928
    Abstract: An audio device capable of inhibiting malfunction of an information terminal is provided. The audio device includes a sound sensor portion, a sound separation portion, a sound determination portion, and a processing portion. The sound sensor portion has a function of sensing sound. The sound separation portion has a function of separating the sound sensed by the sound sensor portion into a voice and sound other than a voice. The sound determination portion has a function of storing the feature quantity of the sound. The sound determination portion has a function of determining, with a machine learning model such as a neural network model, whether the feature quantity of the voice separated by the sound separation portion is the stored feature quantity. The processing portion has a function of analyzing an instruction contained in the voice and generating an instruction signal representing the content of the instruction in the case where the feature quantity of the voice is the stored feature quantity.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 17, 2022
    Inventors: Fumiya NAGASHIMA, Kengo AKIMOTO, Tatsuya OKANO, Yusuke KOUMURA, Seiko INOUE
  • Publication number: 20220292332
    Abstract: A system with high processing speed and low power consumption is provided. The system includes an imaging device and an arithmetic circuit. The imaging device includes an imaging portion, a first memory portion, and an arithmetic portion, and the arithmetic circuit includes a second memory portion. The imaging portion has a function of converting light reflected by an external subject into image data, and the first memory portion has a function of storing the image data and a first filter for performing first convolutional processing in a first layer of a neural network. The arithmetic portion has a function of performing the first convolutional processing using the image data and the first filter to generate first data. The second memory portion has a function of storing the first data and a plurality of filters. The arithmetic circuit has a function of generating a depth map of the image data.
    Type: Application
    Filed: July 30, 2020
    Publication date: September 15, 2022
    Inventors: Yusuke KOUMURA, Koki INOUE, Ayana KIMOTSUKI, Fumiya NAGASHIMA
  • Publication number: 20220252658
    Abstract: The electrical characteristics of a semiconductor element are predicted from a process list. A feature-value calculation portion and a feature prediction portion are used to predict the electrical characteristics of the semiconductor element. The feature-value calculation portion includes a first learning model and a second learning model, and the feature prediction portion includes a third learning model. The first learning model includes a step of learning the process list for generating the semiconductor element and a step of generating a first feature value. The second learning model includes a step of learning the electrical characteristics of the semiconductor element generated in accordance with the process list and a step of generating a second feature value.
    Type: Application
    Filed: May 11, 2020
    Publication date: August 11, 2022
    Inventors: Seiko INOUE, Yusuke KOUMURA, Takahiro FUKUTOME
  • Publication number: 20220147682
    Abstract: A novel wiring layout design method is provided. A wiring layout in which a starting terminal group and an end terminal group are electrically connected to each other is generated using layout information and a netlist. In the case where the wiring layout satisfies a design rule, a wiring resistance and a parasitic capacitance of the wiring layout are extracted. The layout information is updated using Q learning and a new wiring layout is generated. In the Q learning, a positive reward is given when the values of the wiring resistance and the parasitic capacitance decrease, and a weight of the neural network is updated in accordance with the reward. In the case where the new wiring layout satisfies the design rule, a wiring resistance and a parasitic capacitance of the new wiring layout are extracted. In the case where the change rate of the wiring resistance and the parasitic capacitance is high, the layout information is updated using the Q learning.
    Type: Application
    Filed: March 9, 2020
    Publication date: May 12, 2022
    Inventor: Yusuke KOUMURA
  • Patent number: 10949595
    Abstract: A system performs a layout design of a circuit for a small area satisfying a design rule within a short period of time. In a layout design system which includes a processing portion and in which a circuit diagram and layout design information are input to the processing portion, the processing portion has a function of generating layout data from the circuit diagram and the layout design information by performing a Q learning, the processing portion has a function of outputting the layout data, the processing portion includes a first neural network, and the first neural network estimates an action value function in the Q learning.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: March 16, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoaki Tsutsui, Yusuke Koumura, Yuji Iwaki, Shunpei Yamazaki
  • Publication number: 20200184137
    Abstract: To perform layout design for a small area satisfying a design rule, within a short period of time. A layout design system which includes a processing portion and in which a circuit diagram and layout design information are input to the processing portion, the processing portion has a function of generating layout data from the circuit diagram and the layout design information by performing Q learning, the processing portion has a function of outputting the layout data, the processing portion includes a first neural network, and the first neural network estimates an action value function in the Q learning.
    Type: Application
    Filed: June 14, 2018
    Publication date: June 11, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Naoaki TSUTSUI, Yusuke KOUMURA, Yuji IWAKI, Shunpei YAMAZAKI