Patents by Inventor Yutaka Higashiguchi
Yutaka Higashiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7835159Abstract: A second member is superposed on a first member. A first recognition mark is described on the surface of the first member. A second recognition mark is described on the surface of the second members. The first recognition mark is fragmented along the edge of the second member when the second member is superposed on the first member. The second recognition mark ends at the edge of the second member. The second recognition mark cooperates with the first recognition mark for establishment of a predetermined geometric pattern. The relative positions of the first and second recognition marks can be adjusted based on an irregular or unshaped geometric pattern. The second member can thus reliably be superposed on the surface of the first member at the correct position.Type: GrantFiled: August 28, 2007Date of Patent: November 16, 2010Assignee: Fujitsu LimitedInventors: Kinuko Mishiro, Yutaka Higashiguchi, Masahiko Yamashita
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Publication number: 20080101048Abstract: A second member is superposed on a first member. A first recognition mark is described on the surface of the first member. A second recognition mark is described on the surface of the second members. The first recognition mark is fragmented along the edge of the second member when the second member is superposed on the first member. The second recognition mark ends at the edge of the second member. The second recognition mark cooperates with the first recognition mark for establishment of a predetermined geometric pattern. The relative positions of the first and second recognition marks can be adjusted based on an irregular or unshaped geometric pattern. The second member can thus reliably be superposed on the surface of the first member at the correct position.Type: ApplicationFiled: August 28, 2007Publication date: May 1, 2008Applicant: FUJITSU LIMITEDInventors: Kinuko Mishiro, Yutaka Higashiguchi, Masahiko Yamashita
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Patent number: 6144090Abstract: A ball grid array package includes a package board having a bottom surface, a top surface, and peripheral side surfaces, the bottom surface having solder ball pads provided thereon, the top surface having wire bonding pads provided thereon. A semiconductor chip is contained on the package board and electrically connected to the wire bonding pads. Solder balls are arrayed in a grid formation on the bottom surface of the package board and respectively soldered to the solder ball pads of the package board. Electrodes are provided on the peripheral side surfaces of the package board, each electrode having a first portion provided on one of the peripheral side surfaces, a second portion provided on the top surface and a third portion provided on the bottom surface.Type: GrantFiled: September 5, 1997Date of Patent: November 7, 2000Assignee: Fujitsu LimitedInventor: Yutaka Higashiguchi
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Patent number: 6127634Abstract: A wiring board structure includes a board made of a material which can be etched by a given solution, an electrically conductive portion, which is thermally conductive, having a portion which extends from the board and which can be etched by the given solution, and an insulating layer having a portion which is in contact with the board and only the side surface of the electrically conductive portion and which prevents the board from being etched when the electrically conductive layer is etched.Type: GrantFiled: June 13, 1995Date of Patent: October 3, 2000Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Masao Hosogai, Hiroyuki Otaguro, Hitoshi Yokemura, Masaharu Hida
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Patent number: 6038135Abstract: A wiring board to be provided between a packaged electronic component having an integrated circuit and a mother board on which the packaged electronic component should be mounted, includes a base made of an insulating material, a first circuit pattern which is provided on a first surface of the base and has terminals connectable to terminals of the packaged electronic component for external connections, and a second circuit pattern which is provided on a second surface of the base opposite to the first surface thereof and has terminals connectable to terminals provided on the mother board.Type: GrantFiled: January 25, 1996Date of Patent: March 14, 2000Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Makoto Totani, Yasuhiro Teshima
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Patent number: 6023098Abstract: A semiconductor device includes a wiring board, an electronic component supported by the wiring board, a heat conduction layer provided in the wiring board so as to be in contact with the electronic component, and terminals provided on the wiring board and thermally connected to the heat conduction layer through thermal vias provided in the wiring board. Heat generated by the electronic component conducts to the terminals through the heat conduction layer and then conducts to a circuit board on which the semiconductor device is placed.Type: GrantFiled: January 25, 1996Date of Patent: February 8, 2000Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Toshio Kumai, Ryoichi Ochiai, Makoto Totani
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Patent number: 5828128Abstract: A BGA-type semiconductor device has a soldering bump a soldered state of which can be easily checked by visual inspection. A package has a bottom surface which faces the wiring board when the semiconductor device is mounted on the wiring board. A plurality of soldering bumps are provided on the bottom surface of the package. The soldering bumps are in a plurality of different sizes, and are located in positions where the soldering bumps are observable from outside of the package when the semiconductor device is mounted on the wiring board.Type: GrantFiled: February 21, 1996Date of Patent: October 27, 1998Assignee: Fujitsu, Ltd.Inventors: Yutaka Higashiguchi, Toshio Kumai, Yasuhiro Teshima, Mamoru Niishiro, Yasushi Kobayashi, Yukio Sekiya, Shuzo Igarashi, Yasuhiro Ichihara
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Patent number: 5783865Abstract: A wiring substrate has a semiconductor device mounted thereonto, the semiconductor device having ball-shaped externally connecting parts. The wiring substrate includes through holes at positions corresponding to the ball-shaped externally connecting parts and electric conductors provided inside and around the through holes. Land portions of the electric conductors, at which the electric conductors are engaged with the externally connecting parts, includes sectional tapering portions, respectively. Further, the through holes have sectional tapering portions at edge portions in proximity to the land portions, respectively. The ball-shaped externally connecting parts of the semiconductor device are engaged with the land portions provided around the through holes of the wiring substrate and having the sectional tapering portions, respectively.Type: GrantFiled: February 16, 1996Date of Patent: July 21, 1998Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Makoto Totani, Yasuhiro Teshima, Hiroshi Iimura
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Patent number: 5760469Abstract: A semiconductor device includes a package having opposing surfaces, a first terminal for an outer connection supported by said package and electronic components supported by said package, and the opposing surfaces of the package having slits so that a shape of the package can be changed in a mounted state. Therefore, stress applied to soldered junctions of the first and second terminals is decreased.Type: GrantFiled: February 16, 1996Date of Patent: June 2, 1998Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Toshio Kumai, Ryoichi Ochiai, Yasuhiro Teshima, Mamoru Niishiro, Yasushi Kobayashi, Hideaki Tamura, Hiroshi Iimura, Seishi Chiba, Yukio Sekiya, Shuzo Igarashi, Yasuhiro Ichihara
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Patent number: 5631660Abstract: An antenna module capable of finely adjusting the resonant frequency and having an antenna element exclusively used for radio transmission and reception to provide a broad frequency band characteristic. This antenna module is composed of a dielectric substrate molded in a predetermined shape, a grounding conductor in the form of sheet provided on one surface of the dielectric substrate, and antenna element conductor in the form of sheet provided on the opposite surface to the above one surface and having end portion being almost V-shaped end folded, and an adjusting member inserted into the almost V-shaped folded end portion.Type: GrantFiled: November 7, 1995Date of Patent: May 20, 1997Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Takeyasu Maeda, Kazuyoshi Aoki, Kohichi Kamei, Toshiaki Amano
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Patent number: 5455596Abstract: An antenna module suitable for a reduction in size and weight of equipment and improved in manufacturability. The antenna module includes a ground element formed from a planar conductor, an antenna element formed from a planar conductor and arranged in parallel to the ground element, and a loop element formed from a tubular conductor and arranged between the ground element and the antenna element in predetermined positional relationship with both elements so as to be connected with the antenna element. The loop element has a first hollow portion passing therethrough in a given direction. The antenna module further includes an element support formed from an insulator and arranged so as to fill a space between the ground element and the antenna element and substantially fully cover an outer surface of the loop element. The element support is formed with a second hollow portion passing therethrough in the same direction as that of the first hollow portion of the loop element.Type: GrantFiled: December 10, 1993Date of Patent: October 3, 1995Assignees: Fujitsu Limited, Furukawa Electric Co., Ltd.Inventors: Yutaka Higashiguchi, Mitsuo Inagaki, Hajime Mochizuki, Noriyuki Kohma, Yoshikazu Kamei, Toshiaki Amano
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Patent number: 5361488Abstract: A manufacturing method for plural antenna modules which is suitable for mass production. Each antenna module includes a ground element, an antenna element, a loop element, and an element support.Type: GrantFiled: December 10, 1993Date of Patent: November 8, 1994Assignee: Fujitsu LimitedInventors: Yutaka Higashiguchi, Mitsuo Inagaki, Hidenori Tanizawa, Takeyasu Maeda, Noriyuki Kohma, Hajime Mochizuki, Kouroh Mekata, Toshiaki Amano, Yoshikazu Kamei
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Patent number: 5268702Abstract: A ground conducting layer and an antenna element conducting layer are set at a predetermined position in a cavity of a molding die, and molten resin is injected into the cavity, thereby molding a resin-formed member in which said ground conducting layer and said antenna element conducting layer are integrated. As a result of this, there can provided an antenna module comprising a resin member formed by molding to be a predetermined shape, a sheet-like ground conducting layer adhered to one surface of the resin member, a sheet-like antenna element conducting layer adhered to another surface opposing to the one surface of said resin member, and a feeder for feeding electricity to the antenna element conducting layer.Type: GrantFiled: March 26, 1992Date of Patent: December 7, 1993Assignees: The Furukawa Electric Co., Ltd., Fujitsu LimitedInventors: Toshiaki Amano, Hirokazu Shiroishi, Kenichi Fuse, Yutaka Higashiguchi, Hirotaka Kashiwabara, Mitsuo Inagaki, Hidehiro Mishiro