Patents by Inventor Yutaka Sakaue

Yutaka Sakaue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7594873
    Abstract: Disclosed is an exercise-data management system, which comprises a wristband 8 including an IC chip 7 recording therein unique information for authenticating a participant, a studio gate 3 set up in a studio and adapted to wirelessly receive and read the unique information recorded in the IC chip, and an exercise-data management server apparatus 4. The studio gate 3 is operable, when the unique information is read, to transmit information indicating the read to the exercise-data management server apparatus 4.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: September 29, 2009
    Assignee: Konami Sports & Life Co., Ltd.
    Inventors: Shin Terao, Yutaka Sakaue, Ken Midorikawa
  • Publication number: 20070142179
    Abstract: Disclosed is an exercise-data management system, which comprises a wristband 8 including an IC chip 7 recording therein unique information for authenticating a participant, a studio gate 3 set up in a studio and adapted to wirelessly receive and read the unique information recorded in the IC chip, and an exercise-data management server apparatus 4. The studio gate 3 is operable, when the unique information is read, to transmit information indicating the read to the exercise-data management server apparatus 4.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 21, 2007
    Applicant: Konami Sports & Life Co., Ltd.
    Inventors: Shin Terao, Yutaka Sakaue, Ken Midorikawa
  • Patent number: 5939844
    Abstract: A high-frequency horizontal deflection/high-voltage generation apparatus capable of setting inductance of a deflecting yoke without being affected by a collector voltage of a horizontal switching transistor and suppressing power loss while increasing a deflecting pulse voltage so that amplitude adjustment and side-pin correction can be effectuated without incurring any appreciable power loss. A voltage which is higher than the collector voltage V.sub.CP of the switching transistor is applied to the deflecting yoke. A resonant circuit is provided for applying to the deflecting yoke a voltage pulse of positive polarity and that of negative polarity, i.e., the voltage pulses bearing opposite phase relation to each other, for increasing equivalently the voltage applied across the deflecting yoke. The switching waveform outputted from the resonant circuit is synchronized with a switching operation of a high-speed switching element driven by a voltage induced in a winding of the deflecting transformer.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: August 17, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsuhiko Shiomi, Takafumi Nagasue, Yutaka Sakaue