Patents by Inventor Yutaka Yoshino
Yutaka Yoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240159571Abstract: A position detection device includes a motor that rotates a drive target, a periodic sensor that detects a plurality of periods included in a periodic change generated by rotation of the motor, an origin sensor that detects an origin of the motor in a rotation direction, and a controller that controls the rotation of the motor based on signals output from each of the periodic sensor and the origin sensor. A repeated detection error in detecting the origin by the origin sensor is smaller than a rotation range of the motor corresponding to each period of the plurality of periods detected by the periodic sensor.Type: ApplicationFiled: January 4, 2024Publication date: May 16, 2024Inventors: Kazuki YOSHINO, Yutaka MINAMI, Yusuke NAGAE
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Patent number: 8035979Abstract: A printed wiring board includes a built-in semiconductor element. A protective film is formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad. Upper and side surfaces of the built-in semiconductor element are covered with a first insulating film formed by filling a sealing material. The first insulating film is covered with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.Type: GrantFiled: December 13, 2010Date of Patent: October 11, 2011Assignees: CMK Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Yutaka Yoshino, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
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Publication number: 20110090657Abstract: A printed wiring board includes a built-in semiconductor element. A protective film is formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad. Upper and side surfaces of the built-in semiconductor element are covered with a first insulating film formed by filling a sealing material. The first insulating film is covered with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.Type: ApplicationFiled: December 13, 2010Publication date: April 21, 2011Applicants: CMK CORPORATION, RENESAS EASTERN JAPAN SEMICONDUCTOR INC.Inventors: Yutaka YOSHINO, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
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Patent number: 7894200Abstract: The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element.Type: GrantFiled: November 28, 2006Date of Patent: February 22, 2011Assignees: CMK Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Yutaka Yoshino, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
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Publication number: 20090129037Abstract: The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element.Type: ApplicationFiled: November 28, 2006Publication date: May 21, 2009Inventor: Yutaka YOSHINO
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Patent number: 7445964Abstract: A semiconductor device includes at least one semiconductor structure which has a plurality of external connection electrodes formed on a semiconductor substrate. An insulating sheet member is arranged on the side of the semiconductor structure. Upper interconnections have connection pad portions that are arranged on the insulating sheet member in correspondence with the upper interconnections and connected to the external connection electrodes of the semiconductor structure.Type: GrantFiled: December 13, 2006Date of Patent: November 4, 2008Assignees: Casio Computer Co., Ltd., CMK CorporationInventors: Ichiro Mihara, Takeshi Wakabayashi, Toshihiro Kido, Hiroyasu Jobetto, Yutaka Yoshino, Nobuyuki Kageyama, Daita Kohno, Jun Yoshizawa
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Publication number: 20070099409Abstract: A semiconductor device includes at least one semiconductor structure which has a plurality of external connection electrodes formed on a semiconductor substrate. An insulating sheet member is arranged on the side of the semiconductor structure. Upper interconnections have connection pad portions that are arranged on the insulating sheet member in correspondence with the upper interconnections and connected to the external connection electrodes of the semiconductor structure.Type: ApplicationFiled: December 13, 2006Publication date: May 3, 2007Applicants: Casio Computer Co., Ltd., CMK CorporationInventors: Ichiro Mihara, Takeshi Wakabayashi, Toshihiro Kido, Hiroyasu Jobetto, Yutaka Yoshino, Nobuyuki Kageyama, Daita Kohno, Jun Yoshizawa
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Patent number: 7183639Abstract: A semiconductor device includes at least one semiconductor structure which has a plurality of external connection electrodes formed on a semiconductor substrate. An insulating sheet member is arranged on the side of the semiconductor structure. Upper interconnections have connection pad portions that are arranged on the insulating sheet member in correspondence with the upper interconnections and connected to the external connection electrodes of the semiconductor structure.Type: GrantFiled: August 12, 2004Date of Patent: February 27, 2007Assignees: Casio Computer Co., Ltd., CMK CorporationInventors: Ichiro Mihara, Takeshi Wakabayashi, Toshihiro Kido, Hiroyasu Jobetto, Yutaka Yoshino, Nobuyuki Kageyama, Daita Kohno, Jun Yoshizawa
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Publication number: 20050051886Abstract: A semiconductor device includes at least one semiconductor structure which has a plurality of external connection electrodes formed on a semiconductor substrate. An insulating sheet member is arranged on the side of the semiconductor structure. Upper interconnections have connection pad portions that are arranged on the insulating sheet member in correspondence with the upper interconnections and connected to the external connection electrodes of the semiconductor structure.Type: ApplicationFiled: August 12, 2004Publication date: March 10, 2005Applicants: Casio Computer Co., Ltd., CMK CorporationInventors: Ichiro Mihara, Takeshi Wakabayashi, Toshihiro Kido, Hiroyasu Jobetto, Yutaka Yoshino, Nobuyuki Kageyama, Daita Kohno, Jun Yoshizawa
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Patent number: 5563397Abstract: A card C having a predetermined thickness is guided by guide grooves formed in corresponding projecting portions of a card slot to enter. When the leading end of the card C is brought into contact with the lower edges of contact portions of a shutter member, the shutter member is pivoted about the front end sides of arm portions. A shutter plate arranged on the rear end side of the shutter member is moved upward to allow the card C having the predetermined thickness to pass deep. If a card C' having a thickness smaller than the predetermined thickness enters, a regulation portion projecting from the lower portion of the shutter plate of the shutter member is located lower than the bottom surface of a card passage. The leading end of the card C' having the smaller thickness is brought into contact with the regulation portion to prevent the card C' from entering deep.Type: GrantFiled: September 18, 1995Date of Patent: October 8, 1996Assignee: Anritsu CorporationInventors: Osamu Fujimoto, Yutaka Yoshino
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Patent number: 5508501Abstract: In order to certainly receive a proper IC card having a regular length to a terminal contact position without causing a forcible force to act on an integrated circuit incorporated in the IC card to discharge a wrong card having a length smaller than the regular length, an IC card inserted from a card insertion port is advanced toward a card storage unit of a frame having an opening formed in the lower surface thereof while the IC card is slightly pressed downward, and the leading end of the IC card is brought into contact with a card receiver of a slide member. The slide member is biased by a spring toward the card insertion port and is slid backward when the IC card is pressed deeper with a force stronger than the biasing force of the spring.Type: GrantFiled: September 22, 1994Date of Patent: April 16, 1996Assignee: Anritsu CorporationInventors: Osamu Fujimoto, Yutaka Yoshino
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Patent number: 5445309Abstract: In a method for making a joined pipe, a main pipe is cut so that two V-shaped edges of a right angle are formed in the diametrical positions on the periphery of the main pipe, and a branch pipe is cut so that two peaked edges of a right angle are formed in the diametrical positions on the periphery of the branch pipe. Then, the facets of the V-shaped edges and the peaked edges are fused by heating, and butt-welded under pressure.Type: GrantFiled: December 10, 1992Date of Patent: August 29, 1995Assignee: Sekisui Kagaku Kogyo Kabushiki KaishaInventors: Yonekazu Yamada, Yutaka Yoshino, Mitsuhira Kitada, Kazuo Seki
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Patent number: 4837814Abstract: In a telephone set which can be used by inserting a card, a slit-like card insertion port is formed at a portion behind a handset hung up on a hanger of a surface of a housing and a card reader is arranged behind the card insertion port. A projecting hanger assembly is formed on the housing. A hanger portion for receiving the handset is formed at an upper portion of the hanger assembly, and hollow projections are formed at a lower portion thereof. Slits of the card insertion port are formed in the distal end faces of the projections, and the card reader is partially housed in the projections.Type: GrantFiled: September 23, 1987Date of Patent: June 6, 1989Assignee: Anritsu CorporationInventors: Yutaka Yoshino, Makoto Gotoh, Osamu Fujimoto, Masahiro Shizawa
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Patent number: 4721643Abstract: A laminated structure comprising a laminated foamed sheet material composed of two cured foamed sheets each comprising a propylene-type polymer and an ethylene-type polymer and being laminated to each other through a substantially non-foamed or lowly foamed heat-fused layer, and non-foamed surface skin layers composed of a propylene-type polymer and laminated respectively to both surfaces of said laminated foamed sheet material, the ratio of the thickness Ts of each of said surface skin layer to the solid thickness Tf of each of the cured foamed sheets, Ts/Tf, being from 1 to 50, the thickness T1 of the heat-fused layer being 0.1 to 0.5 mm, and the thickness T1 being 1 to 25% of the thickness of each of the cured foamed sheets.Type: GrantFiled: January 28, 1987Date of Patent: January 26, 1988Assignees: Sekisui Kagaku Kogyo Kabushiki Kaisha, Toyota Jidosha Kabushiki KaishaInventors: Hiroshi Harayama, Hideo Nishimura, Satoshi Ohmura, Yutaka Yoshino, Rikizou Tanaka, Fumimasa Kuno
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Patent number: D301036Type: GrantFiled: September 22, 1987Date of Patent: May 9, 1989Assignee: Anritsu CorporationInventors: Hiroyuki Yamazaki, Yutaka Yoshino, Makoto Gotoh