Patents by Inventor Yutaka Yoshizawa

Yutaka Yoshizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5818375
    Abstract: A digital-to-analog converter comprises a digital signal processing unit for receipt of input digital signals and delta-sigma modulation of the input digital signals by over-sampling so as to generate a noise shape digital signal and a digital-to-analog converter coupled to the digital signal processing unit for receipt of the noise shape digital signal from the digital signal processing unit and conversion of the noise shape digital signal into an analog signal, wherein the digital signal processing unit comprises at least a series connection of a plurality of noise shapers.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: October 6, 1998
    Assignee: NEC Corporation
    Inventor: Yutaka Yoshizawa
  • Patent number: 4994885
    Abstract: A Triac comprising a semiconductor body having several regions of two opposite conductivity types, a first main electrode and a gate electrode on one major surface of the semiconductor body, and a second main electrode on the opposite major surface of the semiconductor body. The semiconductor body has an internal first n-type region between a first p-type region, exposed at the one major surface of the body, and a second p-type region exposed at the opposite major surface of the body. The first main electrode contacts the first p-type region and a second n-type region formed therein. The gate electrode contacts a third n-type region also formed in the first p-type region. Additionally, instead of contacting the first p-type region itself, the gate electrode contact a peninsular or insular portion of the first p-type region filling a corresponding recess in the third n-type region.
    Type: Grant
    Filed: June 22, 1989
    Date of Patent: February 19, 1991
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Yutaka Yoshizawa
  • Patent number: 4963509
    Abstract: Gold is diffused into a silicon substrate by first depositing an ultrathin layer of gold on one of the main faces of the substrate and then by heating the substrate to a temperature range of about 300.degree.-850.degree. C., instead of to about 1000.degree. according to the prior art. Then, following the removal of the remaining gold layer from over the substrate, the latter is reheated to a higher temperature ranging from about 700.degree. C. to about 1000.degree. C. for activating the diffused gold. The gold diffusion at the reduced temperature serves to decrease the surface irregularities of the substrate as a result of gold-silicon alloy zones created at the interface between gold layer and silicon substrate during the thermal diffusion process.
    Type: Grant
    Filed: December 12, 1989
    Date of Patent: October 16, 1990
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Yutaka Yoshizawa, Akira Uemura
  • Patent number: 3943014
    Abstract: A monocrystalline silicon wafer is prepared which has formed therein the usual emitter, base and collector regions. A groove is then formed to a predetermined depth in the top surface of the silicon wafer so as to extend along the P-N junction between the base and emitter regions. A silicon oxide layer is formed over the wafer, as by heating the same in an oxidative atmosphere, and the wafer is succeedingly heated in a hydrogenous atmosphere. The silicon oxide layer may be selectively photoetched away where the electrodes are to be formed for the emitter, base and collector of the transistor.
    Type: Grant
    Filed: January 31, 1975
    Date of Patent: March 9, 1976
    Assignee: Sanken Electric Company Limited
    Inventor: Yutaka Yoshizawa