Patents by Inventor Yuuji Kuramoto
Yuuji Kuramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7348739Abstract: A motor driving apparatus makes a carrier signal of an inverter be synchronized with a carrier signal of a DC/DC converter, and determines a phase difference between both the carrier signals based on a ratio of an input voltage inputted to the DC/DC converter and an input voltage inputted to the inverter, and a percentage of modulation and a power factor which are operation parameters of the inverter. When the frequency of the carrier signal of the DC/DC converter is set to be twice as high as that of the carrier signal of the inverter, an optimal phase difference is determined based on the ratio of the input voltage of the DC/DC converter and the input voltage of the inverter.Type: GrantFiled: February 2, 2005Date of Patent: March 25, 2008Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takahiro Urakabe, Tatsuya Okuda, Toshiyuki Kikunaga, Yuuji Kuramoto
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Patent number: 7310475Abstract: A motor driving apparatus is provided which can minimize ripple current flowing through a DC link capacitor, and downsize the motor driving apparatus. It synchronizes the frequency of the inverter carrier signal for driving an inverter with the frequency of the DC/DC converter carrier signal for driving a DC/DC converter, and carries out control in such a manner that the center of a period during which the input current of the inverter is zero and the center of a period during which the output current of the DC/DC converter is zero are matched.Type: GrantFiled: March 31, 2005Date of Patent: December 18, 2007Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tatsuya Okuda, Takahiro Urakabe, Yuuji Kuramoto
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Publication number: 20070080659Abstract: A motor driving apparatus makes a carrier signal of an inverter be synchronized with a carrier signal of a DC/DC converter, and determines a phase difference between both the carrier signals based on a ratio of an input voltage inputted to the DC/DC converter and an input voltage inputted to the inverter, and a percentage of modulation and a power factor which are operation parameters of the inverter. When the frequency of the carrier signal of the DC/DC converter is set to be twice as high as that of the carrier signal of the inverter, an optimal phase difference is determined based on the ratio of the input voltage of the DC/DC converter and the input voltage of the inverter.Type: ApplicationFiled: February 2, 2005Publication date: April 12, 2007Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Takahiro Urakabe, Tatsuya Okuda, Toshiyuki Kikunaga, Yuuji Kuramoto
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Patent number: 7151661Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.Type: GrantFiled: April 3, 2002Date of Patent: December 19, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tohru Kimura, Dai Nakajima, Yuuji Kuramoto
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Publication number: 20060067655Abstract: A motor driving apparatus is provided which can minimize ripple current flowing through a DC link capacitor, and downsize the motor driving apparatus. It synchronizes the frequency of the inverter carrier signal for driving an inverter with the frequency of the DC/DC converter carrier signal for driving a DC/DC converter, and carries out control in such a manner that the center of a period during which the input current of the inverter is zero and the center of a period during which the output current of the DC/DC converter is zero are matched.Type: ApplicationFiled: March 31, 2005Publication date: March 30, 2006Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Tatsuya Okuda, Takahiro Urakabe, Yuuji Kuramoto
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Publication number: 20050041369Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.Type: ApplicationFiled: September 14, 2004Publication date: February 24, 2005Inventors: Tohru Kimura, Dai Nakajima, Yuuji Kuramoto
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Patent number: 6791819Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.Type: GrantFiled: April 3, 2002Date of Patent: September 14, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tohru Kimura, Dai Nakajima, Yuuji Kuramoto
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Patent number: 6580147Abstract: P-electrode 30a and N-electrode 31a of a semiconductor device 2, and capacitors 10 in a plate-like shape or a block-like shape respectively connected to U-phase 40, V-phase 41, and W-phase 42 having a switching element 20 and a diode 21 are built in a semiconductor device 2, and a single or a plurality of capacitors 10 are respectively connected to P-electrodes 30a and N-electrodes 31a in each of the phases, whereby the smoothing capacitors are built in the semiconductor device to reduce wiring inductances, the capacitors are miniaturized, and an entire electric power converting device, i.e. inverter, is miniaturized.Type: GrantFiled: March 14, 2001Date of Patent: June 17, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toru Kimura, Dai Nakajima, Tatsuya Okuda, Takeshi Ohi, Takanobu Yoshida, Naoki Yoshimatsu, Yuuji Kuramoto, Toshinori Yamane, Masakazu Fukada, Majumdar Gourab
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Publication number: 20020158329Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.Type: ApplicationFiled: April 3, 2002Publication date: October 31, 2002Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Tohru Kimura, Dai Nakajima, Yuuji Kuramoto
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Publication number: 20010035562Abstract: P-electrode 30a and N-electrode 31a of a semiconductor device 2, and capacitors 10 in a plate-like shape or a block-like shape respectively connected to U-phase 40, V-phase 41, and W-phase 42 having a switching element 20 and a diode 21 are built in a semiconductor device 2, and a single or a plurality of capacitors 10 are respectively connected to P-electrodes 30a and N-electrodes 31a in each of the phases, whereby the smoothing capacitors are built in the semiconductor device to reduce wiring inductances, the capacitors are miniaturized, and an entire electric power converting device, i.e. inverter, is miniaturized.Type: ApplicationFiled: March 14, 2001Publication date: November 1, 2001Inventors: Toru Kimura, Dai Nakajima, Tatsuya Okuda, Takeshi Ohi, Takanobu Yoshida, Naoki Yoshimatsu, Yuuji Kuramoto, Toshinori Yamane, Masakazu Fukada, Majumdar Gourab
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Patent number: 6181587Abstract: Conventionally, there is a problem that it is impossible to provide an analog signal detecting circuit having high reliability and long lifetime under a bad environment since a photocoupler is used for electrical insulation of a digital signal. Then, an analog signal detecting circuit is provided with a carrier wave generating unit for generating a carrier wave, a pulse width modulating unit for pulse width modulating an analog signal inputted from the signal input terminal by using the carrier wave generated by the carrier wave generating unit and for outputting a digital signal, a reverse level shift HVIC for transmitting the digital signal from one power supply system to the other power supply system, and a demodulation unit for demodulating the digital signal transmitted to the other power supply system into an analog signal and for outputting it to a signal output terminal.Type: GrantFiled: May 17, 2000Date of Patent: January 30, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yuuji Kuramoto, Hirotoshi Maekawa, Kiyoharu Anzai