Patents by Inventor Yuusuke Yamashita
Yuusuke Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10169945Abstract: A medium storage box includes an internal storage space configured to store a paper sheet-shaped medium. The medium storage box includes: a first opening into which an insertion member is inserted from outside; a second opening through which the medium passes; a first shutter member that closes off the first opening; a second shutter member that closes off the second opening; and a biasing mechanism that biases either the first shutter member, or the second shutter member, or both, in a closing direction. The first shutter member is configured to be pressed by the insertion member and moves in an opening direction during insertion of the insertion member, such that a portion of the first shutter member abuts the second shutter member and moves the second shutter member in an opening direction.Type: GrantFiled: December 2, 2015Date of Patent: January 1, 2019Assignee: Oki Electric Industry Co., Ltd.Inventors: Ryousuke Kojima, Yuusuke Yamashita, Hirokazu Komatsu
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Publication number: 20180108200Abstract: A medium storage box includes an internal storage space configured to store a paper sheet-shaped medium. The medium storage box includes: a first opening into which an insertion member is inserted from outside; a second opening through which the medium passes; a first shutter member that closes off the first opening; a second shutter member that closes off the second opening; and a biasing mechanism that biases either the first shutter member, or the second shutter member, or both, in a closing direction. The first shutter member is configured to be pressed by the insertion member and moves in an opening direction during insertion of the insertion member, such that a portion of the first shutter member abuts the second shutter member and moves the second shutter member in an opening direction.Type: ApplicationFiled: December 2, 2015Publication date: April 19, 2018Applicant: Oki Electric Industry Co., Ltd.Inventors: Ryousuke KOJIMA, Yuusuke YAMASHITA, Hirokazu KOMATSU
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Patent number: 9457972Abstract: A medium processing device including a holding section that includes an opening forming a medium insertion port, and that holds a medium inserted through the insertion port, a medium press section that is capable of moving between a first end side wall and a second end side wall of the holding section, and that presses the medium inserted through the insertion port against the second end side wall of the holding section, and an opening-out section that spans between the medium press section and the first end side wall of the holding section, and that opens out in a medium non-holding area between the medium press section and the first end side wall of the holding section accompanying movement of the medium press section from the first end side to the second end side of the holding section in order to press the medium inserted into a medium holding area between the medium press section and the second end side wall of the holding section against the second end side wall of the holding section.Type: GrantFiled: October 8, 2013Date of Patent: October 4, 2016Assignee: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Yuusuke Yamashita
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Patent number: 9209637Abstract: According to one embodiment, a secondary battery control apparatus includes a charger/discharger and a charge/discharge controller. The charger/discharger connects a plurality of secondary batteries, and charges one secondary battery by electric power discharged by another secondary battery. The charge/discharge controller controls the charger/discharger such that charging and discharging are performed between the plurality of secondary batteries by using the charger/discharger if battery temperature information detected by temperature detector is lower than a preset threshold temperature, wherein the charging is stopped and switched to discharging or pause if voltage information detected by the voltage detector reaches the upper limit voltage of the secondary battery, and the discharging is stopped and switched to charging or pause if the voltage information detected by the voltage detector reaches the lower limit voltage of the secondary battery.Type: GrantFiled: March 15, 2013Date of Patent: December 8, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yukitaka Monden, Yuji Okita, Mami Mizutani, Satoru Amaki, Yuusuke Yamashita, Susumu Nishida
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Publication number: 20150298920Abstract: A medium processing device including a holding section that includes an opening forming a medium insertion port, and that holds a medium inserted through the insertion port, a medium press section that is capable of moving between a first end side wall and a second end side wall of the holding section, and that presses the medium inserted through the insertion port against the second end side wall of the holding section, and an opening-out section that spans between the medium press section and the first end side wall of the holding section, and that opens out in a medium non-holding area between the medium press section and the first end side wall of the holding section accompanying movement of the medium press section from the first end side to the second end side of the holding section in order to press the medium inserted into a medium holding area between the medium press section and the second end side wall of the holding section against the second end side wall of the holding section.Type: ApplicationFiled: October 8, 2013Publication date: October 22, 2015Applicant: Oki Electric Industry Co., Ltd.Inventor: Yuusuke Yamashita
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Patent number: 8164005Abstract: A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle.Type: GrantFiled: April 9, 2008Date of Patent: April 24, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yuusuke Yamashita, Ryota Suzuki, Masahiro Tanabe, Taihei Nakada, Tsuyoshi Kumamoto
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Publication number: 20080251288Abstract: A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle.Type: ApplicationFiled: April 9, 2008Publication date: October 16, 2008Inventors: Yuusuke YAMASHITA, Ryota Suzuki, Masahiro Tanabe, Taihei Nakada, Tsuyoshi Kumamoto
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Patent number: 7355863Abstract: A high frequency multilayer integrated circuit is provided with: a multilayer board including n earth conductor layers (n: integer of two or more than two) and (n-1) dielectric layers each arranged between adjacent earth conductor layers; a first high frequency circuit disposed in one of the most outside earth conductor layers of the multilayer board; a first power-supply/control circuit disposed in this most outside earth conductor layer; a second high frequency circuit disposed in at least one of the dielectric layers and connected to the first high frequency circuit in the multilayer board; a second power-supply/control circuit disposed in another one of the most outside earth conductor layers of the multilayer board; and a third power-supply/control circuit disposed in at least one of the dielectric layers at a portion at which the second high frequency circuit does not exist, the third power-supply/control circuit being connected to the first and second power-supply/control circuits.Type: GrantFiled: June 8, 2005Date of Patent: April 8, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Ryota Suzuki, Taihei Nakada, Tsuyoshi Kumamoto, Yuusuke Yamashita
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Publication number: 20050275078Abstract: A high frequency multilayer integrated circuit is provided with: a multilayer board including n earth conductor layers (n: integer of two or more than two) and (n-1) dielectric layers each arranged between adjacent earth conductor layers; a first high frequency circuit disposed in one of the most outside earth conductor layers of the multilayer board; a first power-supply/control circuit disposed in this most outside earth conductor layer; a second high frequency circuit disposed in at least one of the dielectric layers and connected to the first high frequency circuit in the multilayer board; a second power-supply/control circuit disposed in another one of the most outside earth conductor layers of the multilayer board; and a third power-supply/control circuit disposed in at least one of the dielectric layers at a portion at which the second high frequency circuit does not exist, the third power-supply/control circuit being connected to the first and second power-supply/control circuits.Type: ApplicationFiled: June 8, 2005Publication date: December 15, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryota Suzuki, Taihei Nakada, Tsuyoshi Kumamoto, Yuusuke Yamashita