Patents by Inventor YUXIN BAI

YUXIN BAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10871818
    Abstract: A method of an electronic device that includes a power source is disclosed. The method determines a health of the power source, a temperature of the power source, and a state of charge of the power source. The method then sets a performance state cap for the electronic device based on at least the health of the power source.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: December 22, 2020
    Assignee: Apple Inc.
    Inventors: Cyril De La Cropte De Chanterac, Michael Eng, Yuxin Bai, Karen Eckert, John Ananny
  • Patent number: 10775873
    Abstract: In an embodiment, a processor includes: a plurality of first cores to independently execute instructions, each of the plurality of first cores including a plurality of counters to store performance information; at least one second core to perform memory operations; and a power controller to receive performance information from at least some of the plurality of counters, determine a workload type executed on the processor based at least in part on the performance information, and based on the workload type dynamically migrate one or more threads from one or more of the plurality of first cores to the at least one second core for execution during a next operation interval. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventors: Victor W. Lee, Edward T. Grochowski, Daehyun Kim, Yuxin Bai, Sheng Li, Naveen K. Mellempudi, Dhiraj D. Kalamkar
  • Publication number: 20190265777
    Abstract: In an embodiment, a processor includes: a plurality of first cores to independently execute instructions, each of the plurality of first cores including a plurality of counters to store performance information; at least one second core to perform memory operations; and a power controller to receive performance information from at least some of the plurality of counters, determine a workload type executed on the processor based at least in part on the performance information, and based on the workload type dynamically migrate one or more threads from one or more of the plurality of first cores to the at least one second core for execution during a next operation interval. Other embodiments are described and claimed.
    Type: Application
    Filed: February 28, 2019
    Publication date: August 29, 2019
    Inventors: Victor W. Lee, Edward T. Grochowski, Daehyun Kim, Yuxin Bai, Sheng Li, Naveen K. Mellempudi, Dhiraj D. Kalamkar
  • Patent number: 10234930
    Abstract: In an embodiment, a processor includes: a plurality of first cores to independently execute instructions, each of the plurality of first cores including a plurality of counters to store performance information; at least one second core to perform memory operations; and a power controller to receive performance information from at least some of the plurality of counters, determine a workload type executed on the processor based at least in part on the performance information, and based on the workload type dynamically migrate one or more threads from one or more of the plurality of first cores to the at least one second core for execution during a next operation interval. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: March 19, 2019
    Assignee: Intel Corporation
    Inventors: Victor W. Lee, Edward T. Grochowski, Daehyun Kim, Yuxin Bai, Sheng Li, Naveen K. Mellempudi, Dhiraj D. Kalamkar
  • Patent number: 10146286
    Abstract: In one embodiment, A processor includes a logic to receive performance monitoring information from at least some of a plurality of cores and determine, according to a power management model, a performance state for one or more of the plurality of cores based on the performance monitoring information, and a second logic to receive the performance monitoring information and dynamically update the power management model according to a reinforcement learning process. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Victor W. Lee, Yuxin Bai
  • Patent number: 9910481
    Abstract: In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: Victor W. Lee, Daehyun Kim, Yuxin Bai, Shihao Ji, Sheng Li, Dhiraj D. Kalamkar, Naveen K. Mellempudi
  • Publication number: 20170205863
    Abstract: In one embodiment, A processor includes a logic to receive performance monitoring information from at least some of a plurality of cores and determine, according to a power management model, a performance state for one or more of the plurality of cores based on the performance monitoring information, and a second logic to receive the performance monitoring information and dynamically update the power management model according to a reinforcement learning process. Other embodiments are described and claimed.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 20, 2017
    Inventors: Victor W. Lee, Yuxin Bai
  • Publication number: 20160239074
    Abstract: In an embodiment, a processor includes: a plurality of first cores to independently execute instructions, each of the plurality of first cores including a plurality of counters to store performance information; at least one second core to perform memory operations; and a power controller to receive performance information from at least some of the plurality of counters, determine a workload type executed on the processor based at least in part on the performance information, and based on the workload type dynamically migrate one or more threads from one or more of the plurality of first cores to the at least one second core for execution during a next operation interval. Other embodiments are described and claimed.
    Type: Application
    Filed: February 13, 2015
    Publication date: August 18, 2016
    Inventors: VICTOR W. LEE, EDWARD T. GROCHOWSKI, DAEHYUN KIM, YUXIN BAI, SHENG LI, NAVEEN K. MELLEMPUDI, DHIRAJ D. KALAMKAR
  • Publication number: 20160239065
    Abstract: In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.
    Type: Application
    Filed: February 13, 2015
    Publication date: August 18, 2016
    Inventors: VICTOR W. LEE, DAEHYUN KIM, YUXIN BAI, SHIHAO JI, SHENG LI, DHIRAJ D. KALAMKAR, NAVEEN K. MELLEMPUDI